Cadence XCELIUM 21.03.015

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CCRID Product Title
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AVSREQ-116562 ASSERTION_PERFORMANCE Remove VST access during primary simulation for assertion
AVSREQ-134314 RAND_SOLVER xmsim : E*RNDCNSTE Randomization constraint has an error, which will cause the randomize function to return 0 and no new rand values will be set
AVSREQ-138863 RAND_SOLVER Radnomization call contradicts on TRAT but solved with pre-TRAT
AVSREQ-135365 DMS_INTERACTIVE Crash during elaboration with message "sv_seghandler - trapno -1 addr(0x2b3ee6136380)"
AVSREQ-135720 SPECTRE_AMSD Custom vbit source adds quotation marks around parameter when lower in hierarchy
AVSREQ-142710 DMS_LP_AMS Unable to drive UPF supply net using an inout port associated with $cged
AVSREQ-130370 DMS_ELAB Please Support AMS/DMS env variables for VTW
AVSREQ-93049 PARSE_SV Request "extern" constraint declared in class.
AVSREQ-128751 DMS_ELAB xmelab internal error with MESSAGE: cu_connect_var_aca - bad type
AVSREQ-132842 SPECMAN_INTEF Tick notation error on CLI with snapshot
AVSREQ-125101 RAND_SOLVER Skewed distribution with 20.03.v001
AVSREQ-131724 SIM_PERFORMANCE Blocking assignments not propagated correctly
AVSREQ-89502 DMS_LP_AMS Ignore base domains and related checks when the shutoff condition has real numbered expression in macro CPF
AVSREQ-138642 SV_GENERAL consecutive assignment to dynamic array does not work with new[](expression)
AVSREQ-127883 ELAB_SV_VHDL SV-VHDL: generic mapping handling of std_logic type with integer type
AVSREQ-130230 GLS_GENERAL TCL deposit value on output of DFF not overridden by input transitions
AVSREQ-136434 ASSERTION_SVA SVA: a property results in PASS and FAIL at the same time when both of xrun '-assert_count_traces' && TCL 'assertion -strict on' are used
AVSREQ-104104 COVERAGE_CODE set_subprogram_scoring -svpackage functionality
AVSREQ-135119 XPROPAGATION_GENERAL Xprop reports disable on block with VL_INVALID_IDX_CAT
AVSREQ-123893 SIM_CAPTURE_REPLAY XMReplay: Compare signals in a bus after a delay defined by the user (to avoid reporting false mis-matches)
AVSREQ-132346 SPECMAN_INTEF wrong agent (vhdl) assumed in error message
AVSREQ-142973 SV_PORTS xmelab requires warning message on port that are using functions (e.g. $size()) for indexing
AVSREQ-98063 SIMVISION_GENERAL Is cell shape " alu " supported in cell map file? Through schematic shows a circular shape but gives warning too.
AVSREQ-131792 SPECMAN_INTEF OS Signal 11 (segmentation violation) while in Specman during Xcelium migration from 18.07 to 20.09.
AVSREQ-136048 LP_SIM_PERF Support fallback for lps_enable_iso_red_mem for ISOREDM
AVSREQ-101440 UVM_SV_CDNS_EXTENSIONS uvm_hdl_read for vhdl more than 32 bits, bit order is mixed up
AVSREQ-125562 PARSE_SV xmvlog crash in ROP unit (Verilog Syntax Tree)
AVSREQ-139728 SV_CODEGEN Randomization sequence is changing with -linedebug
AVSREQ-131715 XM_UTILS_GENERAL Wrong Order of declaration in Decompiled file
AVSREQ-127389 HAL does not report "CDEFNC" when nested Verilog "case" is used
AVSREQ-138140 LP_BUILD_PERF build with full model requires more then 600GB
AVSREQ-139361 LP_1801 Support for Information Model retention Implementation.
AVSREQ-134201 SV_GENERAL Disable fork is not working
AVSREQ-86547 DMS_WREAL cov1809; `wrealXstate (`wrealZState) being scored in expression coverage
AVSREQ-141468 SPECMAN_INTEF HDL Tick Notation with Package
AVSREQ-94835 VHDL_PARSE $TMPDIR not respected by xcelium
AVSREQ-135463 XPROPAGATION_GENERAL xprop behavior changes with -ENABLE_XPROP_CAOPT
AVSREQ-134516 LP_1801 Use VCT to determine direction
AVSREQ-131891 SV_PORTS xmelab crashes on port using $size()
AVSREQ-74211 LP_1801 2157763 Simulator created a bad database for SimVision and Indago
AVSREQ-125138 UVM_SV CDNS-IEEE library issue while re-invoking the simulation
AVSREQ-116972 DMS_LP_AMS Mix signal simulation lp elaboration performance issue
AVSREQ-130615 SPECMAN_MESSAGES Old logger based commands warnings do not provide source ref.
AVSREQ-128019 SIM_PERFORMANCE *E- ASRTST with newperf(enable_vect_opt) on 20.05.v002
AVSREQ-126424 LP_1801 Introduce "strong" resolution function and modify "weak" resolution function
AVSREQ-144188 SPECMAN_E Invalid pointer encountered by GC at runtime
AVSREQ-138310 JUPITER_BRIDGE NACC file limitation is stopping to check workaround at customer's end
AVSREQ-129631 SYSC_INSTALL Include sc_named.h in Xcelium SystemC
AVSREQ-127630 SIM_PERFORMANCE Internal exception: MESSAGE: tl_expr_count - expr type 624
AVSREQ-141170 SPECMAN_COMPILE Different method results with compiled VS loaded mode
AVSREQ-143321 LP_1801 Enable the change of AVSREQ-138931 with a switch
AVSREQ-134486 SV_GENERAL SVTPOU error
AVSREQ-109759 UVM_SV_CDNS_EXTENSIONS UVM-IEEE : xmsim: *E,PNOOBJ: Path element could not be found: uvm_revision
AVSREQ-116713 LP_1801 UPF connect_logic_net to connect to pins of macro fails with MPTLNT
AVSREQ-128578 SIM_SV xmsim: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-122531 GLS_PERFORMANCE Customer Design: Next Improvement required of 7% in simtime by Q4'20
AVSREQ-143368 DMS_ELAB Testcase crashes when VHDL-AMS electrical vector connects Verilog
AVSREQ-133258 RAND_DEBUG Solver re-ordering variables messing up local_oc output
AVSREQ-126825 SV_CODEGEN *E,ELCOIF in xmvlog_cg
AVSREQ-126187 LP_1801 find_objects usage to find zero bit width signal
AVSREQ-129495 RAND_SOLVER backdoor constraint causes out of bound array index error
AVSREQ-92202 ASSERTION_COMPILE Crash when property uses another property and in a generate
AVSREQ-105580 SV_GENERAL Support for 'with' expression in streaming concatenation, xmvlog: *E,SOWUNS
AVSREQ-125593 SIM_PERFORMANCE Memory performance opportunity by avoid expand
AVSREQ-135044 GLS_PERFORMANCE Weak(strength) non-tran drivers hit performance harder on its tran sim
AVSREQ-105449 SV_GENERAL Support for bitstream operator in assignment to dynamic array
AVSREQ-92460 SIM_SV Self-sensitive continuous assign
AVSREQ-136402 MSIE_ELAB MESSAGE: sv_seghandler - trapno -1 addr((nil))
AVSREQ-121381 MSIE_ELAB DSSVAR Error in multi-xrun incremental elaboration
AVSREQ-105392 SV_GENERAL Xcelium stream operation does not support "with"
AVSREQ-125589 VPI_GENERAL register_cb on bit of md array wire crash
AVSREQ-124178 SV_INTERFACE Elab crash on rerun
AVSREQ-132023 SV_PERF Dumping FSDB hierarchy info taking a long time
AVSREQ-124226 ELAB_BIND [xmelab warning] Report module port list which has no driver wire connection
AVSREQ-130496 CORE_RAND Xceligen give incorrect solver result
AVSREQ-125599 SV_INTERFACE Elaboration crashing with error - MESSAGE: dtv_vifc_find_vii_inst - vii second search failed
AVSREQ-114637 RAND_GENERAL Profile function calls in randomization
AVSREQ-134553 MSIE_SIMULATION Need to resolve UVM Error in customer RTL w/ Dual Snapshot MSIE
AVSREQ-129013 SIM_PERFORMANCE XMSIM crash during FSDB dumping with stacktracesslu_enable_os_pstate - BAD signal to probe
AVSREQ-122322 ELAB_SV FVCAD-30698: xmelab APNOTP error
AVSREQ-139010 ELAB_PERF Internal exception with XCELIUM21.01_e974_lnx86_GPLV3_N210747
AVSREQ-135398 SIM_PERFORMANCE csi-xmsim - CSI: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-139876 SIMVISION_WAVEFORMS Simvision/simvisdbutil missed signals when convert VCD to SST2 format
AVSREQ-130499 SIMVISION_SCHEMATIC SimVision Safety crash with wide nets
AVSREQ-136061 XRUN_GENERAL redirect librun.so to user specified location
AVSREQ-100249 VHDL_PARSE VHDL 2008 - Unconstrained subtypes in records
AVSREQ-134206 LP_DOC Add LP SV interface commands to user documentation
AVSREQ-141463 FUNC_SAFETY_CONCURRENT fault interference leading to 0Ds
AVSREQ-137113 SIM_SV memory load tcl command fails in data-only format when the line end in a space
AVSREQ-126368 VPI_GENERAL VPI with interconnect net definition
AVSREQ-143294 CORE_RAND xmsim: *E,RNDERR: Randomization has encountered a bug (Internal error)
AVSREQ-142141 CORE_RAND CLONE - Green- Downgrade legacy disable switch to note
AVSREQ-112148 UVM_SV_CDNS_EXTENSIONS uvm_hdl_read delivers wrong values when target is greater than 32 bit in VHDL
AVSREQ-126657 PROFILER_XPROF An inappropriately large number of code blocks are showing cpu activity under one virtual interface
AVSREQ-138158 RAND_SOLVER xmsim (solver) crashed with MESSAGE: rts_abrthandler - SIGABRT unexpected violation pc=0x2b539c9bd337 addr=0x2992000066b3
AVSREQ-96503 COVERAGE_GENERAL Wildcard ignore bins transitions are not enforced
AVSREQ-141026 SIM_LICENSE Please integrate licensing client API kit SftShrDev 19.02-s005/20.02-p002 fixed by ccr2202913.
AVSREQ-140329 DMS_LP_AMS MSIE: LP MS elab fails with no reason for the error
AVSREQ-132853 DEBUG_DESIGN_DATABASE tracing of a struct member traces the whole struct
AVSREQ-88523 SIM_SAIF_TCF Saif crashes when interface modport in header module
AVSREQ-90416 SV_PARAMETERS When using both ANSI and non-ANSI params in module gpg only works on the ANSI ones.
AVSREQ-120660 FUNC_SAFETY_XFR XFR reports incorrect reason for abstract results
AVSREQ-128558 ELAB_PERF The counting of registers in elaboration summary report is not correct
AVSREQ-123995 RAND_PERFORMANCE Massive memory usage by solver
AVSREQ-102466 COVERAGE_FSM Request FSM extraction when FSM in case inside
AVSREQ-142222 PROFILER_SIM_RUNTIME Tool crash when trying to generate profile disassembly
AVSREQ-130028 RAND_SOLVER Memory blow up for one randomization call
AVSREQ-128666 LP_1801 Please fix current limitation for the huge elements lists in the "{ }" for one set_retention rule
AVSREQ-131751 XRUN_GENERAL xrun rebuilds files with incdir due to a moved link with autofetch
AVSREQ-100962 UVM_SV UVM IEEE package simulation is not working in GUI mode without input tcl
AVSREQ-102671 COVERAGE_GENERAL Tool crash due to coverage configuration file
AVSREQ-125723 LP_1801 20.03 vs 20.05 LP failure
AVSREQ-141101 CORE_RAND Incorrect null pointer error in backdoor=AOX mode
AVSREQ-141655 LP_1801 Isolation cell is not inserted with -lps_net_split
AVSREQ-111694 DMS_PERF -amsdropt optimize on SystemVerilog variable
AVSREQ-123294 SIM_FORCE_RELEASE ASNUSE - Force of member-select for unpacked structs when using inside loop with none const index
AVSREQ-144935 ASSERTION_SVA Fail assertion which use $time
AVSREQ-141367 CORE_RAND New Solver exception 18rnc_eval_exception with 21.03
AVSREQ-123296 SPECMAN_E OS sig 11 in compiled mode invoking a method defined in base_struct extension
AVSREQ-130037 RAND_SOLVER *F,RNDUNR: XCELIGEN assertion failed - selt_sat_enabled
AVSREQ-137282 COVERAGE_GENERAL IMC merge fails with Java Fatal error when merging with -initial_model union_all
AVSREQ-123684 SIM_PERFORMANCE Incorrect simulation behavior when expression coverage is enabled or when using optimization switches.
AVSREQ-125322 HAL Halcheck IFMULT erratic behavior
AVSREQ-131872 SPECMAN_GENERAL Specman crash in SLES 12/SP5 hosts
AVSREQ-128030 LP_1801 Can't apply UPF_GENERIC_CLOCK to packed struct
AVSREQ-132574 SPECTRE_AMSD CCR 1822016: Need to have parameter value in the cds_globals.vams file override the value specified in the model file
AVSREQ-126847 ELAB_SV *E,APNOTP: Assignment pattern - LHS with a type parameter datatype is not currently supported.
AVSREQ-142688 SPECTRE_AMSD PBSR: Running With HDL Save generates incorrect waveforms at restart time point
AVSREQ-128624 PARSE_SV xmvlog: *E,ERRIPR: error within protected source code
AVSREQ-111968 SPECMAN_DOCS check that error()
AVSREQ-126196 SIMVISION_DB_UTIL Translating VCD to SHM creates incorrect scope for Verilog Escaped Identifiers
AVSREQ-127784 ELAB_SV xmelab: *E,MBXNYI : 'cmfa_pkg::dynArr (dynamic array of packed array [7:0] of logic) (dynArr, file :is not a supported type for mailboxes.)
AVSREQ-127743 SPECTRE_AMSD merge CCMPR02301685 (Refactored AMS publish MTS flow) code to //avs/main
AVSREQ-142679 SPECTRE_AMSD PBSR: Running With HDL Save generates incorrect waveforms at restart time point
AVSREQ-140768 LP_1801 ASRTST error due to assertion control not applied
AVSREQ-97188 PARSE_SV External constraint issue.
AVSREQ-127432 RAND_SOLVER dynamic array size was solved to be 0 before and fails to execute the constraint later
AVSREQ-139640 XRUN_GENERAL DLLSVW warnings generated when running xmls on compiled library compiled with -roelab
AVSREQ-132955 PARSE_SV xmvlog crash in coverpoint
AVSREQ-131507 JUPITER_ENGINE xmelab fails after launching 1123 mccodegens with an xmroot error message
AVSREQ-107273 ASSERTION_SVA F,UNLETE let in sensitivity list unsupported
AVSREQ-130765 PARSE_SV Facing NULLEI error while migrating to Xcelium
AVSREQ-135060 DEBUG_DESIGN_DATABASE No drivers found when tracing in LWD mode - there are in snapshot mode
AVSREQ-131568 SPECMAN_E Wrong results when OTF GC occurs during str_replace() execution
AVSREQ-134222 COVERAGE_PERFORMANCE Functional coverage ignore_bins using with clause very slow
AVSREQ-123027 ELAB_BIND [xmelab warning] Floating in/out module port hierarchically across instances
AVSREQ-136051 SV_INTERFACE support for initial block within an interface
AVSREQ-87375 XRUN_GENERAL -nowarn does not work for CNTSEV
AVSREQ-136759 LP_1801 Xcelium don't support streaming concatenation and report FTSTCT error
AVSREQ-93513 PARSE_SV Competitive: Support "extern" keyword for external constraint block prototypes
AVSREQ-114506 SV_GENERAL xmvlog: *E,UNSSRF (nitro_c_wrapper.sv,177|45): Call to process::suspend or resume not supported in function.
AVSREQ-130917 SPECTRE_AMSD Update all full_fast CR and CMs (including DVS, ss, inh, LP) with new SimVisionMS debugging parameters
AVSREQ-130655 LP_1801 R&D - implement isolation for array of packed objects.
AVSREQ-125111 RAND_PERFORMANCE XMSIM: ~2X increase in memory footprint
AVSREQ-126777 LP_1801 avoid recompiling the UPF package if one exist
AVSREQ-113423 DMS_PERF SV+SPICE: Enable analog tunneling between ports of SPICE blocks which are connected via 'logic' types in the SV parent block
AVSREQ-98368 SIMVISION_TCL Cannot show PSFXL analog signals by sourcing svcf file
AVSREQ-136333 SIMVISION_MS SimVisionMS Mixed Net Browser to better display Mixed Nets in the left hand panel
AVSREQ-139064 LP_1801 Isolation control 'x' value is mirrored as 1.
AVSREQ-124380 LP_1801 INTERNAL EXCEPTION with LPS sim Message: rts_abrthandler - SIGABRT unexpected violation
AVSREQ-128088 COVERAGE_CODE Expression coverage: VHDL reg processes are not correctly covered if XPROP is enabled
AVSREQ-126838 HAL takes a lot of time during "Performing synthesizability checks" and then Crashes
AVSREQ-131358 COVERAGE_MERGING set_covergroup -bin_merge causes toggle merge failure when -initial_model union_all used
AVSREQ-122373 SIM_TCL explicitly redirect the log output to stdout and this does not work when you use a pipe.
AVSREQ-100424 ELAB_BIND Request switch to have -binding switch override the Verilog configuration, as cell clause not inherited
AVSREQ-127821 XRUN_SYSC -I./../ is passing wrong path to xmsc
AVSREQ-112207 COVERAGE_FSM Support for case inside for FSM coverage
AVSREQ-130364 PARSE_SV xmvlog INTERR observed with setting of env variable CADENCE_ENABLE_AVSREQ_63188_PHASE_10
AVSREQ-134261 LP_BUILD_PERF Elaboration hangs a long time at CHECKPOINT (Low Power - end pass one)
AVSREQ-127657 LP_1801 RTNCCER, in 20.07.v001Rc3
AVSREQ-136033 DMS_LP_AMS Elaboration fails with internal exception with ams_pwr_get_xpfrexpr_string in AMS LP simulations
AVSREQ-133783 COVERAGE_FUNCTIONAL coverage dump of a cross with expression taking extremely long time
AVSREQ-140586 SPECTRE_AMSD convergence error occurs only in flex mode for an EEnet and electrical testcase
AVSREQ-129912 LP_1801 *E,ILLDOBJ and *E,ILOBJUE errors when elaborating an UPF create_power_switch construct
AVSREQ-129641 FUNC_SAFETY_CONCURRENT Safety Waveform: Fault node does not show injected value
AVSREQ-138341 CORE_RAND Random sequence differs between x86 and aarch64
AVSREQ-134083 XPROPAGATION_GENERAL Xprop simulation behaving incorrectly with -newperf
AVSREQ-114277 SV_DOC error message for using xrun option -VLOGCONTROLRELAX is not clear
AVSREQ-139067 SPECTRE_AMSD provide a 'x' mode for E2L*_dynsub connectmodules
AVSREQ-132681 RAND_SOLVER 20.07 trat crash - svrnc_trat_rnc_randomize
AVSREQ-122725 JUPITER_SOUTH Add new table to mc_build.stats under a switch
AVSREQ-140700 VHDL_PARSE xmvhdl_p: *E,SELLIB (cfg_if_m.vhd,16|11): unit (SCOREBOARDPKG_SLV) not found in library (OSVVM).
AVSREQ-100939 SIM_PERFORMANCE Outsanding loading time for snapshot
AVSREQ-132867 ELAB_PERF Build performance: goal is 2 or 3 hours build
AVSREQ-134866 SIM_PERFORMANCE Crash during elab – expanded vector
AVSREQ-123712 XPROPAGATION_GENERAL xmvlog_cg crash - gq_frc_compute_tmp_span_closure - tp is an induction variable
AVSREQ-135385 LP_BUILD_PERF Add warning for lps_relax_hierarchy about the performance impact
AVSREQ-142674 SV_CODEGEN The behavior of randomizing changes with or without -classlinedebug option.
AVSREQ-142521 SIM_PERFORMANCE Very high memory usage from using *.* style entries inside afile
AVSREQ-142657 XPROPAGATION_GENERAL Correlation Between VL_ENABLE_INVALID_IDX_XPROP & VL_INVALID_IDX_FOX
AVSREQ-136362 SV_CODEGEN gq_st_gen_swbabp -class default
AVSREQ-136349 GLS_TIMING Elaboration crashed in multi-core run
AVSREQ-126231 DYNAMIC_TEST_SIMULATION Fatal error when using a wrong name of system task call function in dynamic test
AVSREQ-136847 FUNC_SAFETY_CONCURRENT Another different crash on XLM20.11.a001 Concurrent mode
AVSREQ-99052 ASSERTION_COMPILE cuabv_check_all_inst_for_pue: OTP not found for pue internal error during elaboration
AVSREQ-131647 SIM_PERFORMANCE Simulation fails due to pruning when using 20.09-e708 EHF
AVSREQ-135940 VHDL_GENERAL VHDL2008: Support external names in packages
AVSREQ-128579 SV_PERFORMANCE -enable_rswt is breaking UVM environments
AVSREQ-130514 SV_CG_PERF Assignment to a dynamic array in the global scope taking xmvlog_cg a long time
AVSREQ-133132 SIM_USABILITY Enhance -afile for sequential UDPs
AVSREQ-142457 JUPITER_GLST Crash in Netlist::TimingCheckBox::getConditionInputs
AVSREQ-129266 SV_PERFORMANCE DP2.0 low performance, TC tests advance very slow before switching to CDS
AVSREQ-140760 LP_BUILD_PERF add profiling checkpoints and fix comments on existing mp_dump_data
AVSREQ-131332 GLS_GENERAL MESSAGE: cdp_ld_reg_add_trdrv - adding more CDP_LD then space allows
AVSREQ-129843 SIMVISION_CONSOLE Simvision Hyperlinks depend on timeprecision to jump to correct location
AVSREQ-130589 SPECMAN_SAVE_RESTORE Error message in case of corrupted esv file (during restore) is not clear
AVSREQ-129414 LP_1801 XRIO: Remove set_port_attributes command from xrio.upf
AVSREQ-122945 ASSERTION_SVA $assertof does not turn off assertions that declared at package
AVSREQ-132148 JUPITER_COMPILER Snapshot memory footprint too big
AVSREQ-136266 MSIE_ELAB MESSAGE: sv_seghandler - trapno -1 addr(0xffffffffffffffff)
AVSREQ-130673 HAL Customer is getting issue where -> hal -cdslib file not working
AVSREQ-124054 ELAB_SV STACPR does not point to triggering always
AVSREQ-110475 XPROPAGATION_GENERAL [VHDL xprop] [Enhance Request] Supported with VHDL-XPROP delays
AVSREQ-137048 COVERAGE_TOGGLE The name in Variables window in toggle coverage of SV Interface is wrong
AVSREQ-122992 JUPITER_COMPILER xmelab/mcebuild exiting abnormally during splitting
AVSREQ-135708 SIM_PERFORMANCE Test fails (functional error) with -DISABLE_WAKEUP_SEM2009
AVSREQ-123725 SPECMAN_ML_E Specman continues to run after dut error with check effect ERROR_AUTOMATIC in UVM_ML env.
AVSREQ-93556 PARSE_SV Extern constraint - xmvlog: *E,NOTCTC : co is not the name of a constraint prototype in.
AVSREQ-141118 IXCOM mode
AVSREQ-121747 ASSERTION_SVA $realtime in concurrent assertions returns zero value, which seems incorrect.
AVSREQ-129413 SV_PERFORMANCE xmsim INTERR illegal list underflow
AVSREQ-141548 XRUN_GENERAL xrun -elaborate doesn't re-elaborate despite files being re-compiled
AVSREQ-108378 SIMVISION_SCHEMATIC simvision schematic does not work with splitted vectors in ports of modules.
AVSREQ-121140 VHDL_PARSE MESSAGE: sv_seghandler - trapno -1 addr(0x2b148eef0000) - CRC issue?
AVSREQ-136982 PROFILER_SIM_MEMORY Efence is broken
AVSREQ-125906 RAND_SOLVER librnc generates huge memory size which gets terminated with std::bad_alloc
AVSREQ-129016 ELAB_BIND Elaboration in simulation takes nearly 3 hours vs. typical less than 10 minutes
AVSREQ-102547 DMS_BIND SELPFX error in 18.09 / internal error in 19.03 - they should not happen
AVSREQ-135750 VWDB Integerate runtime information of pMain.log into xrun.log
AVSREQ-135363 LP_1801 UPF parser filter out isolation signal with escaped path
AVSREQ-129603 FUNC_SAFETY_CONCURRENT Propagation is not ordered
AVSREQ-101445 UVM_SV_CDNS_EXTENSIONS XM Internal Exception: Need to improve error message from a UVM error
AVSREQ-142533 PARSE_SV Make ENABLE_PROCESS_SELF_WO_PAREN default (EXPPAR for process::self without parentheses)
AVSREQ-137707 PARSE_SV Primary getting recompiled in DSS MSIE flow during incremental run, even after using -enable_smart_cuscope option.
AVSREQ-138182 GLS_TIMING Timing violation is present when run using 64 bit. No timing violation with same seed but using 32-bit simulator.
AVSREQ-124478 XPROPAGATION_GENERAL Usage of 2 state datatypes in case select expression disables XPROP in VHDL
AVSREQ-103509 SPECMAN_E wrong number of bits unpacked into list
AVSREQ-127674 FUNC_SAFETY_CONCURRENT Xcelium fault simulation issues fatal error on new customer design
AVSREQ-122363 XRUN_GENERAL Crash with command-line parameter
AVSREQ-137938 SPECMAN_E Unexpected files.read() result after OTF GC
AVSREQ-107699 ASSERTION_SVA full set of let related issues
AVSREQ-132578 XPROPAGATION_GENERAL XPROP: Incorrect XFSTNC warning
AVSREQ-128702 JUPITER_BRIDGE Using both -nocellaccess and -mce_disable_nocellaccess does not result in an error
AVSREQ-120007 IP_PROTECT_GENERAL xmsim: *F,SIGUSR: Unix Signal SIGSEGV raised from user application code
AVSREQ-104629 XPROPAGATION_GENERAL Array index corruption cat mode
AVSREQ-126553 GLS_TIMING xmelab: *F,INTERR: INTERNAL EXCEPTION (migration to Xcelium)
AVSREQ-146261 SIM_PERFORMANCE xmelab internal error - cu_alcomb_optimize_sensitivity: no bv!
AVSREQ-135897 PARSE_SV xmelab: *F,INTERR: INTERNAL EXCEPTION - MESSAGE: ivia_rpackage_dereference - NULL instance
AVSREQ-128144 PARSE_SV Compile hang due to consider a parameter as a macro name
AVSREQ-137325 PARSE_SV xmvlog: *E,MIMPST reported on using ENABLE_SMART_CUSCOPE option
AVSREQ-120611 FUNC_SAFETY_XFR XFR misses engine and reason for equivalent faults
AVSREQ-91392 PARSE_SV -filemap -incdir fails to control the include path for particular files
AVSREQ-123981 LP_SV RTNCCER, in 20.07.v001 qual
AVSREQ-127086 PROFILER_SIM_MEMORY Add information for registers in memory profiler report
AVSREQ-139579 JUPITER_COMPILER Cannot use –add_seq_delay without units (got –add_seq_delay=1)
AVSREQ-104956 XPROPAGATION_GENERAL Support blocks (combo/sequential) in VHDL which have equal delays
AVSREQ-140364 SIM_PERFORMANCE Tool crash at xmvlog:CodeGen phase with MESSAGE: vsto_ots_pointer - zero offse
AVSREQ-126099 RAND_SOLVER False assignment on part of a packed struct causing randomization failure
AVSREQ-118621 LP_1801 SDA for logical_supply_net
AVSREQ-125895 LP_1801 RTNTYP warning for -no_retention
AVSREQ-136530 LP_1801 Should return the Supply Function name, but it returns the Supply Net name instead.
AVSREQ-136182 LP_1801 Problem with net-spliting when one of the strategies uses -no_isolation
AVSREQ-128991 COVERAGE_FUNCTIONAL Xcelium 20.08 ignores the "ignore_bins… with…" construct inside crosses
AVSREQ-139061 LP_1801 Support for information model UPF_LOCATION and UPF_SOURCE_FILTER
AVSREQ-137587 DEBUG_DESIGN_DATABASE AVSREQ-132853 partial fix - tracing of a struct member traces the whole struct
AVSREQ-133273 PROFILER_SIM_RUNTIME Support for -profthread and -profile for xmsim with xeDebug
AVSREQ-123324 COVERAGE_GENERAL Default support of Arrays of covergroup instances
AVSREQ-126169 MSIE_ELAB Tool crashed in -genhref MSIE flow
AVSREQ-118911 ASSERTION_SVA Incorrect behavior for $past in always block
AVSREQ-134881 XRUN_GENERAL Request to not let xrun updating sys.d during sim time
AVSREQ-137667 SIM_SV casting from bitvector to string broken when vector contains 0
AVSREQ-130505 MSIE_SIMULATION -replicate_top of generated module gives 'x
AVSREQ-128809 VPI_GENERAL Latest Xcelium version causing Verdi crash
AVSREQ-139754 SIM_PERFORMANCE UNSUSF error when FSDB dumping is enabled
AVSREQ-119665 ELAB_SV getting xmelab: *E,CUIOAI when using instance of interface array
AVSREQ-107325 COVERAGE_FUNCTIONAL Simulation hangs on coverage dump
AVSREQ-127441 SV_GENERAL Systemverilog fork-join statement activation issue
AVSREQ-138680 SIMVISION_GENERAL xcelium> error starting plugin /apps/cds1/xcelium20/tools/simvision/plugins/64bit/invoke_ida.so
AVSREQ-131100 SIM_PERFORMANCE xmsim intermittent crash with stack trace sv_seghandler_aux & rtl_countdrivers
AVSREQ-107137 VHDL_PARSE E,STIUNC (ahb_m_pkg.vhd,51|39): subtype indication must not denote an unconstrained array type [3.2.1.1].
AVSREQ-130046 XPROPAGATION_GENERAL Xprop issue wit VHDL generates
AVSREQ-126616 ELAB_SV_VHDL SV-VHDL: Configuration-based component instantiation flow. Generic mapping handling of VHDL literal with SV parameter of logic type.
AVSREQ-130588 SPECMAN_SAVE_RESTORE No error message emitted when save command does not end properly
AVSREQ-122244 PROFILER_XPROF XProf giving incorrect results
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AVSREQ-135689 SPECMAN_UVM_E uvm e vr_ad : revert the change of order of calls to set_static_info()
AVSREQ-130989 COVERAGE_FUNCTIONAL Internal exception when using cross with bins containing expressions
AVSREQ-112377 PROFILER_XPROF xprof support on lna64
AVSREQ-131349 GLS_GENERAL tsmc_mux flop is not working as expected
AVSREQ-122402 SIM_SV Signal is not updated correctly on the left side of an assignment
AVSREQ-132336 LP_1801 NOLIBAS for PA model with UPF
AVSREQ-136404 LP_1801 Report unsupported UPF commands
AVSREQ-128703 DMS_ELAB xmelab internal error with MESSAGE: cu_connect_var_aca - bad type
AVSREQ-136320 ELAB_SV Elaboration crash in via sanity
AVSREQ-137320 LP_1801 do not implicitly apply logical_supply attribute
AVSREQ-127111 DMS_LP_AMS Internal fatal error - subelem_chain_next - cannot descend to datatype (748)
AVSREQ-120043 COVERAGE_FUNCTIONAL Allow fine grain of assertion coverage selection and deselction
AVSREQ-129480 GLS_SDF xmelab SEGV when using -ntc_xxx options
AVSREQ-136378 ELAB_SV_VHDL E,CSGMSS information insufficient
AVSREQ-117456 FUNC_SAFETY_XFR XFR misses engine and reason for abstract results
AVSREQ-119552 LP_1801 Support for stream concat. "xmelab: *W,FTSTCT: [LPS] Streaming concatenation at (./module_a.v:8) ignored for low power.
AVSREQ-115320 LP_1801 connect_logic_net not connecting upper hierarchy output port with lower level hierarchy
AVSREQ-115322 LP_1801 connect_logic_net is not working while connecting output of an instance to an input of another instance
AVSREQ-129612 SIM_TCL Potential memory leak observed in Xcelium 19.09 (Unable to complete simulation)
AVSREQ-127161 PROFILER_SIM_MEMORY Introduce disable option for static memory profiling under memdetail
AVSREQ-141505 XRUN_GENERAL -xmlibdirname is not expanding $ variable in below scripting form
AVSREQ-125127 SIM_SV clocking event not waking class task
AVSREQ-134833 LP_1801 Isolation cell for split net insertion is not expected
AVSREQ-129606 FUNC_SAFETY checker conditional single_value strobe not detecting the fault
AVSREQ-141337 LP_1801 Report unsupported UPF commands in a file
AVSREQ-125272 LP_BUILD_PERF Elaboration performance for power aware design
AVSREQ-137514 RAND_SOLVER Random constraint failure with contradictions
AVSREQ-136670 RAND_PERFORMANCE Randomization performance issue, calls takes almost everything in simulation
AVSREQ-124416 XRUN_GENERAL xmvlog INTERR: ls_walk_to_file - end of args
AVSREQ-140999 SPECMAN_GENERATION method call sampled when shouldn't
AVSREQ-127113 XPROPAGATION_GENERAL vhdl-xprop integer support
AVSREQ-123987 MSIE_ELAB False xmsim: *W,PMFPLI1 generated in MSIE flow
AVSREQ-130718 MSIE_ELAB Parallel build internal error : xmsim MESSAGE: svhrm_svhr - default (0)
AVSREQ-139720 PARSE_SV xmvlog *E, FAABP1 should merge with FAABP2 error
AVSREQ-136013 COVERAGE_SIMULATION unexpected COVMIA warning
AVSREQ-89292 MSIE_SIMULATION MSIE - SV Configuration for design instance selection of primary
AVSREQ-131759 COVERAGE_GENERAL Enable support for illegal/ignore bins with Coverage write API
AVSREQ-138820 LP_1801 Elaboration crash with 20.12 agile, cs_get_netidp2 - offset non-zero for non-vector
AVSREQ-130631 ELAB_SV How to generate LWD when part of RTL is not available in Palladium flow?
AVSREQ-128881 LP_1801 build crash in pwrFindInstX (20.05.t002)
AVSREQ-110738 XPROPAGATION_GENERAL [VHDL xprop] [Enhance Request] Support for VHDL-XPROP integers
AVSREQ-127236 LP_1801 Output of liberty switch is driven to UNDERTERMINED when input is OFF
AVSREQ-133638 CORE_RAND New null pointer error for class parameter in constraint
AVSREQ-135732 DEBUG_DESIGN_DATABASE missing annotations when using as inputs to a macro
AVSREQ-108396 DMS_BIND amsd bindings ignored when instantiated within SV generate block
AVSREQ-130383 SV_CODEGEN Codegen error - INTERR "gq_unlink - too many preds"
AVSREQ-140032 SIM_SV xmsim SIGSEGV in the middle of a running simulation
AVSREQ-139548 JUPITER_COMPILER Refining error message which suggest to use "mce_splitting_break_huge_cones" in Zero delay design
AVSREQ-120724 PROFILER_XPROF Xcelium crash with xprof
AVSREQ-128948 GLS_GENERAL MUX is behaving unexpected in LPS
AVSREQ-134363 PARSE_SV xmparse bug
AVSREQ-137479 LP_1801 struct assignment fails in LPX simulation
AVSREQ-136252 GLS_SDF sv_seghandler - trapno -1 addr((nil))
AVSREQ-142534 LP_1801 LP-NORTELE error occurrence at Xmelab
AVSREQ-141605 FUNC_SAFETY_CONCURRENT DDs turn into DUs in concurrent simulation
AVSREQ-88959 DMS_AXUM SV+SPICE: Support real var array connected to output ports of SPICE block
AVSREQ-135842 UVM_SV_CDNS_EXTENSIONS endianness incoherence for uvm_hdl_read between verilog and vhdl target
AVSREQ-139400 SPECMAN_TEMPORAL Wrong behaviour of nested 'all off' and 'all of for' in a TCM
AVSREQ-136384 DMS_SVAMS xmvlog : MESSAGE: p1_xal_xfile: not at design unit end
AVSREQ-134272 SIM_PERFORMANCE Xcelium crash during elaboration for design migration
AVSREQ-130592 SIM_SAIF_TCF internal exception while using dumpsaif tcl command
AVSREQ-126111 JUPITER_GL_SC Support power aware checks using pmos/nmos
AVSREQ-102604 SIM_SV Continuous assignment statement adding some unexpected delays in I2C model
AVSREQ-129577 SV_INTERFACE UVM_INFO outpuf of virtual interface occasionally shows z value in stdout
AVSREQ-141095 CORE_RAND Internal error with MESSAGE: svrnc_trat_new_class_select:97182 - nonstatic global U00017029 is not a parameter
AVSREQ-143068 SPECMAN_E Simulation crash with Specman OS 11 when probing after the simulation started
AVSREQ-119402 SAVE_RESTART_DMTCP Segmentation fault in Xcelium when using PBSR feature.
AVSREQ-128442 COVERAGE_SIMULATION xmsim INTERR during coverage dumping
AVSREQ-140933 LP_1801 set_partial_on_translation impacting net resolution
AVSREQ-141182 SV_CODEGEN Use of -linedebug changes UVM randomization results.
AVSREQ-136037 LP_1801 UPF isolation rule priority (ports over instance) violated
AVSREQ-128358 CORE_RAND User solve before is ignored for partsel
AVSREQ-128798 ELAB_SV_VHDL SV-VHDL: generic mapping handling of SV param of type packed array mapped to VHDL generic of type integer/integer array
AVSREQ-128639 SIM_SV Simulator crashes with internal error
AVSREQ-132773 ELAB_SV *W,BNDWRN: Bit select out-of-declared bounds leads to simulation failure
AVSREQ-121668 RAND_DEBUG -xceligen oc_format=1 points at wrong line
AVSREQ-113539 LP_1801 Support reset for latch based isolation strategies
AVSREQ-140590 GLS_TIMING INTERNAL EXCEPTION : bad path delay
AVSREQ-119049 SV_PERFORMANCE Array not changing by function call
AVSREQ-139520 SPECMAN_TEMPORAL var value kept across TCM invocations in compiled code
AVSREQ-92954 PARSE_SV Support "extern" keyword for external constraint block prototypes.
AVSREQ-129870 RAND_DEBUG Latest librnc's break local_oc output
AVSREQ-138344 FUNC_SAFETY Update XFS plugin to consider white spaces at the end of hierarchy for escaped names while reading faults.csv
AVSREQ-110286 LP_1801 turn lps_supply_full_on to runtime flag
AVSREQ-138976 MSIE_SIMULATION sim crashed with message: svhrc_dec - EXTERNAL/INTERNAL
AVSREQ-117485 DMS_LP_AMS Default value of wreal signal is 0.0 and it's not creating an event with create_hdl2upf_vct when the signal on hdl is driven with 0.0
AVSREQ-136371 SIM_PERFORMANCE Incorrect simulation results for a flop driven by OOMR under specific conditions
AVSREQ-126102 PARSE_SV xmvlog crashes with MESSAGE: Unexpected signal #11, program terminated (null)
AVSREQ-125268 ASSERTION_SVA $past behaves incorrect when running with -noassert
AVSREQ-128719 LP_1801 Crash: subelem_chain_next - cannot descend to datatype (748)
AVSREQ-139578 SIMVISION_DB_UTIL Simvisdbutil gives xmsim *E,TCLERR on tcl prompt during translation
AVSREQ-122049 PARSE_SV Compilation hangs when -enable_strict_macroref is added.
AVSREQ-88571 ELAB_SV 4) EXPRPA EXPSMC EXPENP errors with let construct
AVSREQ-122027 SV_GENERAL xmvlog: *E,QAAIMX, Packed unions are not yet implemented as the element data type for a dynamic array or dynamic array of fixed array [SystemVerilog].
AVSREQ-127790 SV_CODEGEN mccodegen increases MSIE incremental elaboration time
AVSREQ-131188 RAND_SOLVER XMSIM crash when TRAT enabled with stacktrace sv_abrthandler & rtl_svrandomize
AVSREQ-128397 LP_1801 [Implementation] Improve messaging when global_always_on_power drives a power port
AVSREQ-117008 RAND_DEBUG Need to clarify iteration timeout messages
AVSREQ-121325 SIM_SV Unclear simulator miss behavior
AVSREQ-136000 XPROPAGATION_GENERAL Support X-Propagation for Dynamic Size Memory
AVSREQ-88655 LP_1801 Isolation cells insertion is ignored
AVSREQ-125951 SV_INTERFACE Elab crash when UPF + COVERAGE are both enabled.
AVSREQ-132523 DEBUG_DESIGN_DATABASE interface shown as array of interfaces instead of single instance
AVSREQ-135660 SIM_TCL Internal simulation error
AVSREQ-122325 COVERAGE_GENERAL Add functional cover to UNR analysis
AVSREQ-135219 DMS_LP_AMS LP_MS:Tool crash during elab with lps_ams_supply_ie and +lps_ams1801_debug options –> subelem_chain_next - cannot descend to datatype
AVSREQ-135768 PARSE_SV xmvlog:EXPPAR [9.2.2(IEEE)].expecting parentheses ('()'
AVSREQ-131723 LP_1801 Please fix current tool issue for handling the UPF compile error with black box
AVSREQ-103466 LP_1801 Improve messaging related to Global_Always_On_Power/Global_Always_On_Ground
AVSREQ-137916 JUPITER_BRIDGE mcgfe is taking 110 minutes (more than the full sc elab) in a customer design
AVSREQ-128191 RAND_SOLVER crash in solver v002 - xciligen dir t001
AVSREQ-130833 DMS_LP_AMS Multiple Power Source Models are not holding Sequential Logic in Corruption
AVSREQ-92526 ELAB_SV reduce CUVUNF to warning for several debug flows
AVSREQ-127160 DMS_SVAMS Compilation Errors using -svams_2019 in protected code
AVSREQ-140752 LP_1801 Information model returns an empty string on retention strategies created using UPF_GENERIC_CLOCK.
AVSREQ-124767 GLS_GENERAL incorrect value propagated from buffer - GLS
AVSREQ-128886 ASSERTION_SIM Error in `xmsim': free(): invalid pointer: 0x00000000ea5a5a60
AVSREQ-134581 RAND_DEBUG xmsim: *F,RNDUNR: XCELIGEN assertion failed - priority_in_multi_solver
AVSREQ-131544 SPECTRE_AMSD Connect Modules are visible in design browser while AICM visibility is unselected in option form
AVSREQ-130047 DMS_LP_AMS xmelab internal error in a LP AMS simulation
AVSREQ-137214 XPROPAGATION_GENERAL xmelab: *F,INTERR: Internal Exception : Message: gq_e_conditional - datatype default (784)
AVSREQ-135460 COVERAGE_FSM parameterized FSM not being extracted from pragma
AVSREQ-134205 ASSERTION_SVA Can -ABV_LRMCOMPLIANT_ASRTCTRL be made default?
AVSREQ-142496 LP_1801 state retention on latch not working
AVSREQ-126349 SPECMAN_GENERATION Intelligen internal error during translation
AVSREQ-116650 PARSE_SV Replication operation in an unpacked array concatenation is allowed even though it is illegal per LRM
AVSREQ-137774 LP_1801 Replace Perl script with xmlib2cdb
AVSREQ-133345 COVERAGE_ALL_COVERAGES Xcelium crash when coverage is collected
AVSREQ-140371 JUPITER_ENGINE MC_CUST_EVAL: South crash in "Asm generate recipes" in ATPG design
AVSREQ-141630 SV_SYSTEM_TASK_FUNCS xmelab: *E,ACTUNS od some combination of $assertcontrol
AVSREQ-122436 SIMVISION_GENERAL Simvision crashes after making particular custom layout as default
AVSREQ-100720 DEPRECATED_CORE_PROFILER discrepancy in xprof gui and .out report
AVSREQ-93151 PARSE_SV Extern constraint in class not supported
AVSREQ-135968 ELAB_VHDL Xcelium Internal Error (xmvhdl_cg)
AVSREQ-128253 GLS_PERFORMANCE Make -CKSHASHINT as public option in xmsdfc/xmelab (reduced compile time from 52hrs to 3hrs)
AVSREQ-126951 MSIE_SIMULATION xmsim: *F,INTERR: INTERNAL EXCEPTION w/ MESSAGE: svh_deref -h out of bounds
AVSREQ-124834 SV_CODEGEN TOOL: xmvlog_cg(64) 20.05-t001-20200722 gq_unlink - too many preds
AVSREQ-123667 ASSERTION_PERFORMANCE Simulation seg faulting when initiating simulation - may be related to profiler
AVSREQ-131041 VPI_GENERAL Connection to LWD crashes upon restore-user-state
AVSREQ-142355 SPECTRE_AMSD Enable additional datatypes in ICM
AVSREQ-134869 RAND_SOLVER "xa" tool name conflicting with SNPS fast spice simulator name
AVSREQ-115806 SV_PARAMETERS xmvlog: *E,SVTPOU (collctor.sv,59|33): Currently type parameter override is not supported for semaphore
AVSREQ-123356 SV_GENERAL [$sformatf] Escape string %% doesn't become % character.
AVSREQ-133739 SV_CODEGEN xmelab: *F,INTERR: Message: apx - can't abstract pointer, 0x002b23 of 0x64a4198
AVSREQ-128203 RAND_SOLVER Randomization internal error Can't allocate memory - 20.05.v002
AVSREQ-92628 COVERAGE_FSM Ability to extract FSM coded inside generate-if block
AVSREQ-111404 CORE_RAND Downgrade legacy disable switch to note
AVSREQ-137286 SIM_PERFORMANCE Fix RTL-version of ENABLEF/FN_IF_X method.
AVSREQ-130944 ELAB_PERF getting xmelab: *F,INTERR: INTERNAL EXCEPTION with Xcelium agile 20.09
AVSREQ-125696 SV_CODEGEN Crash during elaboration – vst_classname
AVSREQ-85736 MSIE_ELAB False warning reported in MSIE : xmsim: *W,PMFPLI1: The previous PLI1 definition of $c_func is being redefined via
AVSREQ-130535 COVERAGE_CODE set_glitch_strobe incorrectly scores expression
AVSREQ-141098 CORE_RAND xmsim: *F,RNDUNR: XCELIGEN assertion failed - !! new_inst
AVSREQ-97994 SIMVISION_DB_UTIL Valid scope reported "not found" converting SST2 Simvison data to SAIF format
AVSREQ-132587 COVERAGE_SIMULATION Simulation stops unexpectedly without any error message
AVSREQ-138221 SV_DPI Support for longint one dimensional unpacked array type in DPI export function
AVSREQ-134048 SV_PARAMETERS Gate sim elaboration crash with sv_seghandler - trapno -1 addr(0x803da53d8)
AVSREQ-128161 SV_CODEGEN Internal error when compiling
AVSREQ-126730 GLS_TIMING negative offsets in $nochange checks do not seem to be honored
AVSREQ-126740 MSIE_ELAB Crash during simulation using single-step MSIE
AVSREQ-126842 ELAB_SV Simulation diff due to virtual interface variable with no real interface instance
AVSREQ-125266 PARSE_SV Implement a way for ncvlog to search in own library first for packages
AVSREQ-136528 ELAB_PERF Elaboration up to 2x in new project
AVSREQ-139264 SIM_SV Xcelium crash by empty task call
AVSREQ-135267 PROFILER_SIM_RUNTIME xmsim: *F,INTERR crash
AVSREQ-121385 SIM_CAPTURE_REPLAY Insert fixed delay on specified signals during replay
AVSREQ-131389 LP_CPF $lps_link_power_domain_state fails to recognize a power domain in some macro CPFs
AVSREQ-136312 LP_1801 spurious MULSPLY in 20.12
AVSREQ-139633 PARSE_SV ILLGVR, This genvar cannot be used in this context
AVSREQ-115973 SV_PERFORMANCE Huge performance overhead in 3rd party VIP
AVSREQ-138029 DMS_ELAB Need a fix for AMSELABTRACE
AVSREQ-124084 VPI_GENERAL Genafile doesnt gen the right access level to signals being forced by uvm_hdl_force
AVSREQ-135779 ELAB_BIND CUNOTB despite vlog configuration
AVSREQ-131064 SIM_SV Tool crashes with options "-atstar_selftrigger" + "access rw"
AVSREQ-143171 FUNC_SAFETY_CONCURRENT MESSAGE: cu_mapot - not pointer xor data (pmp=0xf1fc57ff dmp=0x2800 i=50)
AVSREQ-125360 ASSERTION_PERFORMANCE LPX simulation crashes when profile is enabled
AVSREQ-129400 SIM_TCL Catch does not return non-zero value on command that returns errors when run on its own.
AVSREQ-85841 SIMVISION_DESIGN_BROWSER Simvision cause "ERROR: DAC" whenever close lwd db
AVSREQ-130121 RAND_GENERAL melab: *E,NINDXR (./NINDXR_test_case.sv,40|14): Indexing is not currently supported for this prefix.
AVSREQ-132154 LP_1801 Isolation strategy is applying isolation only to the first signal passed in isolations elements list.
AVSREQ-105058 SV_GENERAL Xcelium stream operation does not support "with"
AVSREQ-120713 HAL Hal Fata Error
AVSREQ-89085 LP_1801 Need support for upf_create_object_mirror and upf_query_object_pathname
AVSREQ-131431 ELAB_PERF Elaboration performance is 5x slower compared to competitor (VCS)
AVSREQ-135001 ASSERTION_PERFORMANCE Improve deferred assertion performance by increasing flushing hash size
AVSREQ-128374 LP_1801 More support for Information model UPF_PARENT_POWER_SCOPE, UPF_POWER_TOP
AVSREQ-109987 LP_1801 Support special use case of underscore as hierarchy delimiter with generate blocks in UPF
AVSREQ-115942 LP_1801 Issues with connect_logic_net
AVSREQ-123820 SIM_TCL Tcl function returns different outputs from same expression call
AVSREQ-132354 PARSE_SV INTERR "MESSAGE: move_source_chunks…() - attempt to walk off the end of the src chunk array" when -enable_strict_macroref is used
AVSREQ-135716 LP_1801 Functionality to exclude AON modules from LPS_AUTO_AON_MODULE
AVSREQ-87504 DMS_ELAB Need an error message enhancement for elaboration errors with respect to OOMRS to signals in Supply Sensitive Domains.
AVSREQ-102169 VHDL_PARSE xmvhdl_p STIUNC, workaround? When will it be officially available?
AVSREQ-121470 PARSE_SV Function/task declarations missing from parseinfo cuscope
AVSREQ-79008 LP_DOC How case does IES generate multiple LPV_DMN_PB_NO_ISOLATIOn_TOGGLE assertion?
AVSREQ-131373 SV_CODEGEN xmvlog_cg: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-140224 MSIE_ELAB MESSAGE: sv_seghandler - trapno -1 addr((nil))
AVSREQ-135451 DMS_INTERACTIVE Mixed Network - Crash in customer design
AVSREQ-125831 SIM_PERFORMANCE Getting *F, INTERR : INTERNAL EXCEPTION at Xmelab step, in Xcelium version 20.03.008
AVSREQ-126829 ASSERTION_PERFORMANCE Scheduling optimization: always_comb with final deferred assertions
AVSREQ-146017 JUPITER_BRIDGE Signal abort during linker in DSS flow
AVSREQ-126166 ASSERTION_SVA xmvlog: *E,UNDIDN (UNDIDN.sv,25|0): 'i_rotate': undeclared identifier [12.5(IEEE)].
AVSREQ-141470 HAL Hal crash - halstruct: *F,HALSIG:
AVSREQ-139292 SIM_PERFORMANCE Always block Pruning case-2
AVSREQ-125392 COVERAGE_FSM Support for parameterized FSM
AVSREQ-138429 SV_DPI UNSUAF error with DPI-C error and shortreal
AVSREQ-127830 SPECMAN_INTEF Internal error in sn_get_inner_form() using tick access with computed name in a macro
AVSREQ-122821 SIM_VCD XCELIUM 20.03, 20.06 crash while VCD $dumpoff
AVSREQ-125889 LP_1801 flop Q getting updated twice within a delta cycle but rising edge clock only occurs once
AVSREQ-120807 JUPITER_RTL_SC INTERR MESSAGE: rts_abrthandler - SIGABRT unexpected violation pc=0x3bce232495 addr=0x3dfe40b0000c2a9
JIRA ID COMPONENT SUMMARY
AVSREQ-139652 LP_1801 UPF: create_supply_net -resolve parallel fails with W,SNDRMU for parallel switches with ramping input voltage
AVSREQ-125885 SIM_SV Separate warning IDs for *W, IIFAOB
AVSREQ-135468 RAND_SOLVER conflicting constraint issue with multi pass (solving array sizes in different bucket)
AVSREQ-136098 ELAB_SV Tool crash with -ii_val option on SoC project(60505)
AVSREQ-138695 DMS_LICENSE show_rand_real does not capture real randomization done with std::randomize
AVSREQ-125705 LP_1801 SPA is not working as expected
AVSREQ-124049 CORE_RAND New overconstraint failure for SV code that worked in older versions
AVSREQ-132610 XRUN_GENERAL Is there a way for user to find out what mnemonics are errors/warnings?
AVSREQ-140903 SV_CG_PERF xmelab: *F,DLNFS: Packed library for 'worklib' ….
AVSREQ-114503 PARSE_SV xmvlog: *E,UNDIDN (/nitro_io.sv,49|24): 'nitro_io_mem_size': undeclared identifier [12.5(IEEE)].
AVSREQ-126728 DEBUG_DESIGN_DATABASE No drivers were found when tracing signal in GLS
AVSREQ-123803 SIM_PERFORMANCE Reduced static memory consumption caused by nested generate blocks
AVSREQ-134967 PARSE_SV crash: Internal error when adding a breakpoint (logical line not setup correctly)
AVSREQ-89083 LP_1801 9) Adding support for upfHandleT and other constructs in this family
AVSREQ-117454 FUNC_SAFETY_XFR Reason and engine is lost when XFR reports from UCD with abstract results
AVSREQ-87367 LP_CPF Instances in power source default domain do not get corrupted properly
AVSREQ-129653 JUPITER_BRIDGE internal error when adding -mce_acc_estimation
AVSREQ-136531 SIM_PERFORMANCE "-delay_trigger" does not work when it is used with "-enable_opt_delaytrigger".
AVSREQ-137976 MSIE_SIMULATION getting internal exception with simvision "reset" command with uvm_ml and MSIE flow
AVSREQ-139973 LP_1801 Do not create NOISELE when all ports from stategy are floating
AVSREQ-134551 GLS_TIMING Gate sim elaboration crash with "acg_merge_nodes: parent/child link inconsistent!"
AVSREQ-137946 LP_1801 feedthrough members remain corrupted.
AVSREQ-133642 ELAB_CLONE xmclone creates partitions less than 5% ECW
AVSREQ-121645 ASSERTION_SVA Enhance Assertion VPI to be able to do GlobalAssertionCallback
AVSREQ-118444 SV_CODEGEN xmvlog_cg crash "gc_mov - class mismatch"
AVSREQ-117562 DMS_LP_AMS LP-MS: xmelab performance issues in LP/AMS flow on checking parameter 'vpso' of power aware IEs
AVSREQ-141113 CORE_RAND segmentation fault in svrnc_trat_get_instance_node_variable_class_member_nonstatic
AVSREQ-138437 COVERAGE_MERGING java exception when loading merged database
AVSREQ-89391 SV_DOC Correct the extended help description of mnemonic MODIOI
AVSREQ-132864 JUPITER_ENGINE *F,MCEASRT: SDF simulations with multicore
AVSREQ-128138 RAND_SOLVER RNDUNR RNC internal Randomization error, unexpected exception
AVSREQ-140369 MSIE_ELAB xrun tries to append the primtop name to the logfile name
AVSREQ-115279 PARSE_SV xmvlog crashes in one of the macros
AVSREQ-134380 DMS_LP_AMS LP MS - supply net not being connected through domain mapping
AVSREQ-142364 LP_1801 [LPS: -lps_net_split] Why these samples are different?
AVSREQ-120464 ELAB_SV getting xmelab APNOTP error - Assignment pattern - LHS with a type parameter datatype is not currently supported
AVSREQ-102812 GLS_GENERAL Xcelium gives the wrong output value of a mux in a simulation.
AVSREQ-127752 MSIE_ELAB Wrong MSIE message when having bind to a primary
AVSREQ-98419 ASSERTION_SVA assertion fail question
AVSREQ-122528 GLS_PERFORMANCE Customer Design: Improve 7% in simtime by Q3'20
AVSREQ-133228 RAND_SOLVER Solver solving for values outside of an enum
AVSREQ-125971 SPECMAN_ERRORS Internal error accessing memory with tick access without 'verilog variable' statement
AVSREQ-114847 SIM_SV Using -atstar_selftrigger with SL3 model (encrypted) crashes at runtime
AVSREQ-110213 UVM_SV Class hierarchy is not displayed when using CDNS-IEEE version of UVM library
AVSREQ-129587 PARSE_SV xmvlog: *E,MIMPST (mcs_dig_div_asserts.sv,82|31): I_sync_load_async cannot be resolved, as it is defined in package tx_env_pkg and package orx_env_pkg which are both wild card imported
AVSREQ-134214 JUPITER_COMPILER MCE xmelab got crash error - No valid fallback for South-1 was found
AVSREQ-101879 PARSE_SV csi-ncsim - CSI: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-134982 SPECMAN_OTHER_LANGUAGES FLI-C Interface and WARN_EXTEND_AFTER_TEMPLATE Message
AVSREQ-126252 XPROPAGATION_GENERAL X-Propagation disabled for unsupported datatype in LHS BOOLEAN for VHDL
AVSREQ-107341 XPROPAGATION_GENERAL Exclude bound modules from xprop hierarchy
AVSREQ-119059 SIM_PERFORMANCE ff does not sample input data after clk return from x
AVSREQ-135836 SIM_PERFORMANCE Elaboration crashed without -plusperf
AVSREQ-136765 SIM_SAIF_TCF xmsim: *F,INTERR: INTERNAL EXCEPTION with dumptcf command
AVSREQ-126447 SV_CODEGEN xmvlog_cg: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-123624 ASSERTION_DEBUG Additional debugging facilities for assertion control tasks
AVSREQ-130612 GLS_TIMING Discrepancy between Timing Violation reported and waveform
AVSREQ-146253 LP_1801 xmsim: *F,SIGUSR: Unix Signal SIGSEGV raised from user application code
AVSREQ-100369 XRUN_GENERAL -nowarn CNTSUP used, but warning still generated
AVSREQ-132549 RAND_SOLVER *F,RNDUNR: XCELIGEN assertion failed - ! selt_node()->opset().test( RNC_FUNC_CALL ) || ! _func_call_nodes.empty()
AVSREQ-140907 SPECTRE_AMSD ams_flex spectreX UDB: Bus bit signal waveforms stop marching after saving snapshots
AVSREQ-134767 PARSE_SV Text reference is marked incorrectly - Part 2
AVSREQ-96490 DMS_ELAB Enable bus support for analog_port_alias
AVSREQ-110072 LP_1801 Connect_logic_net is not working as per the expectation and giving MPTLNT warning
AVSREQ-142864 SV_PERF Unexpected library disk space usage
AVSREQ-125618 SPECTRE_AMSD Internal error related to protobuf version of xmelab 20.03.005
AVSREQ-100380 COVERAGE_FSM Please Enhance FSM extraction mechanism to extract fsm state when next_state to state is in if generate block
AVSREQ-101065 GLS_GENERAL v_seghandler - trapno -1 addr in elab
AVSREQ-134978 SIM_SV Simulator crashes after stopping on a breakpoint and continue the run
AVSREQ-117500 COVERAGE_MERGING Enhance merge to be able to do union_all merge when set_covergroup -bin_name_merge is usued
AVSREQ-133845 JUPITER_SOUTH NACC analysis is taking lots of time and causing elaboration time degradation
AVSREQ-115657 LP_1801 signals connected through connect logic net are not showing correct value in waveform
AVSREQ-135472 LP_1801 LPBADARG object already mirrored when reset simulation back to time 0 on gui mode
AVSREQ-124933 LP_1801 UPF: LPS cannot shutdown when power ON and pwell OFF.
AVSREQ-127824 LP_1801 XRIO Parser bug: wrong element for top-level isolation cell
AVSREQ-132323 FUNC_SAFETY_CONCURRENT rts_abrthandler - SIGABRT unexpected violation pc=0x33c9032495 addr=0xa4b2000046e0
AVSREQ-130257 PARSE_SV CADENCE_ENABLE_AVSREQ_63188_PHASE_10 crashes xmvlog
AVSREQ-133062 JUPITER_COMPILER stats_analyzer failed at the end of elaboration
AVSREQ-135561 LP_1801 elaboration crashed at elab step
AVSREQ-97232 SIMVISION_SCHEMATIC FF symbol does not display correctly.
AVSREQ-130575 LP_1801 UPF auto-compiler breaks the current flow for pre-compiled libs
AVSREQ-130618 MSIE_ELAB Auto MSIE support for NOTDOT error to reference sub instans param
AVSREQ-128136 PARSE_SV xvmlog crashes with "Unexpected signal #11, program terminated (null)" message
AVSREQ-128897 MSIE_ELAB msieunlock simperf causes CUVUNF elaboration error
AVSREQ-138143 XPROPAGATION_GENERAL LPX - memory bit get corrupted - mccodegen
AVSREQ-134748 LP_1801 Support relative path resolution on upf_get_handle_by_name(..) when relative_to = upf_null
AVSREQ-130267 DMS_ELAB Clock signal not being generated with -newperf
AVSREQ-137317 LP_1801 update text of LSNDLIB error message
AVSREQ-114292 ELAB_SV xmelab: *E,APNOTP: Assignment pattern - LHS with a type parameter datatype is not currently supported
AVSREQ-104216 COVERAGE_FSM Request ability to extract FSM from generate block
AVSREQ-122403 LP_1801 Isolation Insertion differences between Xcelium & CLP
AVSREQ-123657 MSIE_SIMULATION xmsim: *F,INTERR: INTERNAL EXCEPTION w/ MESSAGE: sv_seghandler - trapno -1 addr(0x27d)
AVSREQ-131360 DMS_PERF Unexpected simulation result with combinations of options: (-rnm_tech -dms_auto_svrnm_perf) or (-automsie -msie_resolve_amsxpt)
AVSREQ-124921 SIM_PERFORMANCE Memory consumption issue in simulation - nested forgen
AVSREQ-92337 PARSE_SV Give parser error on call to std::randomize with class handle argument
AVSREQ-133230 GLS_SDF Gate level sim crashing at sdf annotation
AVSREQ-81802 DMS_VLOG Xcelium crashes with message cu_doic_characterize_ams_analog_helper - cu_is_expression_analog/viao_is_analog phase
AVSREQ-124469 SIM_USABILITY genafile does not record access to a field of struct array
AVSREQ-135250 SPECMAN_UVM_E uvm_scbd dead lock in method match_in_scbd()
AVSREQ-136440 SIM_PERFORMANCE UNSUSF error when FSDB dumping is enabled
AVSREQ-141453 SPECMAN_E rf_struct_layer created for rf_method_type causing null access error
AVSREQ-139018 SPECTRE_AMSD Illegal type real shift operand (left operand) in vcvs gain expression
AVSREQ-124321 RAND_SOLVER RNDCNSTE slices of unpacked arrays are currently not supported
AVSREQ-138534 LP_1801 connect_supply_net requires curly bracket and and does not recognize backslash as delimiter
AVSREQ-142485 FUNC_SAFETY_CONCURRENT Simulation crash on always block
AVSREQ-126649 RAND_SOLVER Solver complaining about out of bounds array access despite guard
AVSREQ-127655 DEBUG_DESIGN_DATABASE Incorrect instance displayed in Simvision after using MSIE
AVSREQ-136326 LP_1801 xmelab INTERR sv_seghandler - SIGSEGV while handling SIGSEGV in UPF build
AVSREQ-141777 XPROPAGATION_GENERAL Invalid file/line for error XPACFC
AVSREQ-126611 CORE_RAND Exclusion syntax need to be supported for OX config file
AVSREQ-135065 DEBUG_DESIGN_DATABASE Indago DT not working in LWD mode - works in snapshot mode
AVSREQ-139931 MSIE_ELAB Cannot build the PiP MSIE topology
AVSREQ-133420 JUPITER_COMPILER Stats analyzer logs are not compressed leading to 7.8G of disk space
AVSREQ-138364 SV_PERFORMANCE Queue select overhead in CPU group SCC block
AVSREQ-126372 SV_CODEGEN tb_o8 optimization leads to xmvlog_cg crash
AVSREQ-134085 MSIE_SIMULATION xmsim: *F,INTERR: INTERNAL EXCEPTION w/ MESSAGE: sv_seghandler - trapno -1 addr((nil))
AVSREQ-140258 DEBUG_DESIGN_DATABASE Indago becomes unresponsive when opening call stack
AVSREQ-134427 SV_GENERAL xmelab: *E,NOTDOT (./top.sv,8|16): Hierarchical name ('cfi_if.MY_DELAY')
AVSREQ-138317 JUPITER_COMPILER MC_CUST_EVAL: Huge build memory blow up due to splitting in ATPG Case-2, 5X mem overhead
AVSREQ-102298 COVERAGE_GENERAL Wildcard ignore_bins for transition
AVSREQ-103575 SPECMAN_COV Specman: Support non-const values in no_collect
AVSREQ-131755 RAND_PERFORMANCE Randomization is taking a long time in new TRAT solver as compare to before
AVSREQ-133065 DYNAMIC_TEST_SIMULATION Dynamic Test Crash with Unresolved SystemTask Name and DMTCP
AVSREQ-88954 SV_GENERAL xmvlog: *E,SOWUNS (testit.sv,18|22): with expression in streaming concatenation is not supported
AVSREQ-134371 SIM_PERFORMANCE xmsim INTERR at time 0
AVSREQ-121048 SIM_SV_VHDL Unsupported usage of Mixed OOMR when target is VHDL port - worked in 19.03
AVSREQ-133804 ELAB_BIND RNGDIR error with no pointer to source code
AVSREQ-131785 SPECTRE_AMSD Improve the ability to visually see the small diamond connect module icons in the Schematic Tracer
AVSREQ-116622 SV_GENERAL xmvlog: SOWUNS, "with" expression in streaming concatenation is not supported.
AVSREQ-136724 JUPITER_GL_SC Trireg signal with xminitialize is having value 'X' in Multicore
AVSREQ-135354 ELAB_PERF Improve the build (in elaboration specifically code generation) time in GLS+SDF environment
AVSREQ-124745 RAND_GENERAL 'x' in a output reg starting in 20.06 agile
AVSREQ-140070 GLS_TIMING Elab crash with GLS simulation, 0 delay works fine
AVSREQ-123151 MSIE_ELAB CUVUNF for out of primary function call with msieunlock oopr_to_interface
AVSREQ-135286 SV_INTERFACE assign to logic in interface doesn't work - LP simulation
AVSREQ-129844 LP_1801 Support for Unpacked struct in retention in UPF simulations
AVSREQ-128026 RAND_SOLVER Solve before on struct not being inherited for struct members
AVSREQ-130446 COVERAGE_TOGGLE Toggle Coverage support for "set_toggle_ports_only/no_ports" with "set_toggle_scoring -auto_interface"
AVSREQ-115985 DMS_AMSD Floating wreal1driver net should initialize to `wrealZstate instead of 0
AVSREQ-132898 RAND_SOLVER XCELIGEN crash with assertion failure
AVSREQ-137088 ELAB_BIND elab crash with 20.11-a001 / monolithic snapshot / -portchecks
AVSREQ-137693 IXCOM Internal Exception while elaborating customer design containing tristate bus across emulator/simulator boundary
AVSREQ-130045 DEBUG_PROBE Wave dumping dominates the profile
AVSREQ-131871 SIM_PERFORMANCE xmelab crashed with message sv_seghandler - trapno -1 addr((nil))
AVSREQ-121322 GLS_GENERAL WIDTH timing check not ignored inside module specified in configuration file
AVSREQ-120179 LP_1801 xmsim crash with -lps_new_packed option
AVSREQ-122251 SV_GENERAL psprintf not recognizing values passed with %%d when it calls through $value$plusargs
AVSREQ-120183 SV_GENERAL Allow use of disable <label> on label fork
AVSREQ-135093 LP_1801 Elaboration crash for Modem UPF environment when running with Xcelium20.11.e835
AVSREQ-141031 LP_1801 MULTRTN error happens at xmelab with different elements
AVSREQ-140461 SIM_PERFORMANCE simulator crash on elaboration
AVSREQ-122413 SV_PERFORMANCE ENABLE_EHCA: VST access for offset
AVSREQ-134212 SIM_PERFORMANCE Big slowdown on continuous assignments using generate loop, even with -ENABLE_FG_EXPAND_EXT
AVSREQ-124453 PARSE_PERF RECOME & DUPUNI related issues
AVSREQ-112718 DMS_ELAB Unable to get information needed to solve issues reported by TYCMPAT error
AVSREQ-114705 GLS_TIMING INTERNAL EXCEPTION during elaboration
AVSREQ-120436 VHDL_PARSE Array Index constraint mismatch error *E,TRAICMM with encrypted secure VHDL RTL file
AVSREQ-90887 PARSE_SV xmvlog *F p2_mexpr
AVSREQ-129384 LP_1801 need information to debug NOIMDR error/warning
AVSREQ-133744 FUNC_SAFETY_CONCURRENT XFS barrier sim crash vst_name() - invalid class
AVSREQ-129127 ELAB_SV New warning ILREPA does not give sufficient information
AVSREQ-140864 LP_1801 Support for non-standard retention mirror
AVSREQ-108135 DMS_ELAB xmvlog_cg internal exception with message vsto_class() - mixed bus, class 520
AVSREQ-138298 SV_GENERAL Internal exception when dynamic array slice out of bounds
AVSREQ-141459 DEBUG_DESIGN_DATABASE Driver tracing goes to the wrong line
AVSREQ-128400 RAND_SOLVER Backdoor constraint causing conflict
AVSREQ-134065 LP_1801 LPBADARG error calling task upf_create_object_mirror()
AVSREQ-134658 SV_CODEGEN xmelab: *F,CGFAIL: Code generation failed for one or more modules.
AVSREQ-121303 SV_PERFORMANCE xmsim: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-138516 DMS_LP_AMS elab crash with -lps_ams_sim
AVSREQ-108060 LP_1801 xmelab: *E,FTSTCT: [LPS] Streaming concatenation at (:646) ignored for low power.
AVSREQ-142016 GLS_GENERAL [GLS] Incorrect simulation results when dumping fsdb from Xcelium
AVSREQ-126895 SIM_FORCE_RELEASE Release does not work at time0 with UPF
AVSREQ-126441 GLS_GENERAL Real to Logic Conversion is incorrect
AVSREQ-124651 RAND_GENERAL Profiler (-profile/-xprof) shows wrong callstack and function with pre_randomize calls
AVSREQ-132852 SIM_PERFORMANCE Simulation performance degradation with multiple dimension array assignment
AVSREQ-136504 DMS_LP_AMS Low Power driven net onto a SPICE block causes connect module to see high Z causing voltage output to be near zero
AVSREQ-135499 SIM_CONGRUENCY Congruency support in Dual Snapshot ( MSIE )
AVSREQ-108677 ASSERTION_DEBUG add note on assertion off/on
AVSREQ-113014 SIM_TCL describe command not working per help
AVSREQ-128989 CORE_RAND $urandom with Verilog 'force' results in the same value
AVSREQ-134548 XRUN_GENERAL CNTSEV errors generated with +fsmdebug option when using xmfile_msgcntl file
AVSREQ-136062 XRUN_GENERAL enhancement to convert -L to -rpath for $ORIGIN flow
AVSREQ-140357 JUPITER_COMPILER MC_CUST_EVAL: South crashing in "ASM generate recipes", degradation with 20.12-a001
AVSREQ-117382 SV_PARAMETERS SCWNPO error generated when no instance with default parameter which makes it a negative value is in the design
AVSREQ-141878 SV_GENERAL xmsim crash (Method SSS_MT_ETPP_SUBELEM)
AVSREQ-131725 UVM_INSTALL Incorrect UVM IEEE installation in Xcelium
AVSREQ-124306 FUNC_SAFETY_SIM pthu_get_parsed_path - null path
AVSREQ-129125 SV_GENERAL Warning request in for accessing non-existent queue index
AVSREQ-123954 ELAB_SV *W,BNDWRN: Support wire type - bit select out of boundary
AVSREQ-128426 FUNC_SAFETY_CONCURRENT [X490] NOT_SIMULATABLE xmsim: *W,FLTCRTLLD
AVSREQ-93051 PARSE_SV 'extern' not allowed before constraint declaration.
AVSREQ-129134 ELAB_SV Need an enhancement for xmelab: *E,APNOTP (./xc_work/v/1n.sv,13|26): Assignment pattern - LHS with a type parameter datatype is not currently supported.
AVSREQ-148399 SPECMAN_COV Cadence/XCELIUM/21.02.001- Running Specman testbench faulier
AVSREQ-135471 LP_1801 upf_get_handle_by_name returns wrong handle in case multiple power domains with the same name.
AVSREQ-133288 DMS_INTERACTIVE SimVisionMS INTERNAL EXCEPTION rts_abrthandler - SIGABRT unexpected violation
AVSREQ-93526 PARSE_SV Support for implicit 'extern constraint'.
AVSREQ-126179 ELAB_SV_VHDL xmelab: *W,CEXPWM with SV unsized literals
AVSREQ-139936 SIMVISION_GENERAL error starting plugin /apps/eesof/cadence/XCELIUM/v20.09/linux/tools/simvision/plugins/64bit/invoke_ida.so
AVSREQ-119119 COVERAGE_CODE [From customer] About IMC tool question
AVSREQ-117232 DYNAMIC_TEST_SIMULATION Dynamic Test xmsim crashing with wrong system task name
AVSREQ-123990 VPI_GENERAL xminit_log buggy for -delay_udp_xminitialize and-xminit_log
AVSREQ-127700 COVERAGE_GENERAL *E,SVCNIC - An embedded coverage group not instantiated in the 'new' method
AVSREQ-112470 SIM_USABILITY xmelab: *F,AFAINST Access file MAX include depth has been exceeded.
AVSREQ-138084 DEBUG_DESIGN_DATABASE Indago shows NA value for parameter
AVSREQ-120627 ASSERTION_DEBUG provide additional logging facilities for assertion control tasks
AVSREQ-137477 LP_1801 New version with 1801 Linter fix for the issue related to namespace and unknown upf command error.
AVSREQ-125484 LP_1801 Please support a non lib extension name with liberty file name
AVSREQ-146113 RAND_SOLVER Random index value with negative numbers
AVSREQ-140887 SIM_SV Monolithic Simulation Crash : Message : sv_seghandler - trapno -1 addr((nil))
AVSREQ-125892 SIM_FORCE_RELEASE Value command not matching waveform value for vector that was forced
AVSREQ-114894 PARSE_SV xmelab crash with optional expression missing in for loop
AVSREQ-131810 HAL Fatal error "halcheck: *F,HALSIG "
AVSREQ-140991 FUNC_SAFETY_CONCURRENT MESSAGE: sslu_sig_signal_assign - NULL trdrv value
AVSREQ-132616 SYSC_INSTALL Include sc_named.h in Xcelium SystemC - Check-in to nova, agile and green
AVSREQ-130333 XPROPAGATION_PERFORMANCE XPROP enabled simulation consuming huge time.
AVSREQ-136781 JUPITER_BRIDGE XMELAB crashes in customer's design
AVSREQ-134903 ELAB_SV_VHDL [Mixed-language] Request to avoid CGNSZE with -relax option
AVSREQ-101003 LP_1801 Support of add_state_transition in Xcelium
AVSREQ-127919 RAND_DEBUG Print warning message when OC timeout happens
AVSREQ-123375 VHDL_PERFORMANCE VHDL compilation 3x behind competition
AVSREQ-127178 LP_1801 spath_bestpath() - bad parameter elab crash in UPF+Liberty model on (illegal) real variable interaction
AVSREQ-126739 ELAB_SV_VHDL Verilog parameter to vhdl generic type mismatch
AVSREQ-127081 ELAB_SV XMELAB tool crashes with stacktrace ssl_object_to_signal_nacc and dpes
AVSREQ-98563 MSIE_ELAB need support for reg (at output port of prim) for multi-step MSIE - DSSVAR
AVSREQ-134604 DMS_LP_AMS LPS: internal error in LP MS simulation
AVSREQ-144508 XRUN_GENERAL CCMPR02027678 Enhancement req. -makelib with -v and -y
AVSREQ-133592 SIM_TCL explicitly redirect the log output to stdout and this does not work when you use a pipe - NY
AVSREQ-135599 ELAB_SV_VHDL Xcelium Internal Error
AVSREQ-136503 LP_1801 xmlib2cdb tool not failing
AVSREQ-140983 FUNC_SAFETY_CONCURRENT fault is U in serial and D in concurrent due to bit used in strobe
AVSREQ-128402 JUPITER_ENGINE MC GLST Crashing at simulation time 0 - calling $disable_warnings
AVSREQ-137098 RAND_PERFORMANCE optimize bit blasting of less-or-equal in WifSAT for cases when one side is a constant
AVSREQ-137120 VPI_GENERAL New Verdi crash
AVSREQ-126782 LP_1801 LP crash with 20.08-i002 kit
AVSREQ-118871 SV_PERFORMANCE Simulator behavior change with nocellaccess
AVSREQ-124536 LP_1801 xmsim crash during VHDL function call
AVSREQ-107339 ASSERTION_COMPILE Non supported hierarchical reference to sequence/properties within nested for-generate causes crash
AVSREQ-128574 SIM_SV Simulation failure caused by passing queue as inout to tb task in customer environment
AVSREQ-128115 PARSE_SV xmvlog internal exception crash when using option "-source_debug"
AVSREQ-137324 LP_1801 do not create LSNDLIB error if there is a upf driver
AVSREQ-133375 JUPITER_BRIDGE Multi-Core Performance: 41M RTL processes getting NACCed in customer design
AVSREQ-136479 SV_CODEGEN XCELIUM_VERSION=XLMAGILE20.05.001 - Randomization changes with and without uvm_set -config * recording_detail UVM_FULL
AVSREQ-109604 SV_GENERAL To support "disable <fork_block_label>;"
AVSREQ-127848 SV_CODEGEN xmvlog_cg: *F,INTERR: INTERNAL EXCEPTION (MESSAGE: gq_st_dumpvars - not identifier)
AVSREQ-126849 SV_DATATYPES *E,NOTREL error during elaboration phase.
AVSREQ-128492 DMS_MSIE MSIE compile error with option -automsie
AVSREQ-92265 COVERAGE_FSM Request ability to extract FSM from generate block
AVSREQ-123948 CORE_SV_IN Need an enhancement to set different timescale for CU Scope from command line
AVSREQ-132651 PARSE_SV Include packages code in -classlinedebug
AVSREQ-137736 SIM_SV hdl path lookup from with package
AVSREQ-139542 JUPITER_COMPILER Graceful exit when tool gets "huge un-splitable cones" error
AVSREQ-108672 COVERAGE_CODE Code between pragma coverage off/on being reported as uncovered
AVSREQ-133496 SPECMAN_HAL Unjustified HAL EAVDUN error
AVSREQ-137595 PROFILER_SIM_RUNTIME Efence is broken
AVSREQ-136924 CORE_RAND version 20.09-s004 has a memory leak in the system verilog constraint engine
AVSREQ-137919 SPECTRE_AMSD Incorrect parameter passing during AMS simulation
AVSREQ-131772 ELAB_SV XMELAB crashes with lps_sv_interface_enh and lps_sv_allow_dead_nodes options
AVSREQ-134713 JUPITER_COMPILER xmelab: *F MCEASRT: mcebuild internal error
AVSREQ-129557 SV_INTERFACE xmelab INTERR cu_merge_ports - psize (176) != csize(1)
AVSREQ-120640 LP_1801 Pre-compile the SV UPF Package at compile time without needing -lps_1801 option
AVSREQ-141168 CORE_RAND Test fails when backdoor_mode=OX
AVSREQ-117045 SIM_CAPTURE_REPLAY For internally generated clocks in the SoC, need XMREPLAY_CLOCK to support hierarchical paths
AVSREQ-89440 LP_1801 MPTLNT incorrectly reported for apply_power_model where the same signal is connected to multiple instances
AVSREQ-130400 SIM_PERFORMANCE Customer Test errors out with enable_gprune_ns
AVSREQ-88958 DMS_AXUM Support digital blackbox partial elabortion for mixed signal simulations
AVSREQ-126253 XPROPAGATION_GENERAL X-Propagation Disabled for Unsupported datatype in Case INTEGER for VHDL
AVSREQ-128017 RAND_DEBUG Add file & line number to user-defined solve…befores in utrace
AVSREQ-125333 DMS_MSIE Xcelium MSIE does not work with wreal model
AVSREQ-131044 SV_CODEGEN Crash in code generation on UVM pkg
AVSREQ-101069 COVERAGE_GENERAL Problem in wildcard ignore_bins for transition covergroup
AVSREQ-100854 COVERAGE_ALL_COVERAGES Option to enable coverage for everthing
AVSREQ-118654 SIM_TCL TCL comparison not working when unsized value is used as an operand.
AVSREQ-122058 SIM_SV Unexpected RTSVAV
AVSREQ-122818 XRUN_GENERAL -nosncomp to work also with .elib files
AVSREQ-138981 SIM_VHDL Loading VHDL snapshot crashes -> Traceback (most recent call last):
AVSREQ-140432 SIM_PERFORMANCE enable_var_opt_core gives xmelab INTERR tl_find_partial_assign - bad assignment
AVSREQ-120084 SV_LET Untyped Let formal / Arbitrary expression / expression with actual not supported in phase 4
AVSREQ-134387 SIM_SV Xcelium crashes with TRNULLID message
AVSREQ-142722 MSIE_ELAB incremental elab crashes with -genhref in chiplevel build
AVSREQ-128737 GLS_GENERAL Tool crashing with LPS when switching off the domain in Zero delay simulation
AVSREQ-125534 ASSERTION_SVA ASRTST messages on assertion pass
AVSREQ-124575 XRUN_GENERAL Unable to locate snapshot in flow-recording
AVSREQ-125132 DMS_BIND In post-CLIPS elab binding, schematic view should be skipped
AVSREQ-128781 ASSERTION_PERFORMANCE Assertion performance : degradation on customer tests with Assertion turned on
AVSREQ-127895 SV_GENERAL Incorrect LRM interpenetration of disable label
AVSREQ-131746 PARSE_SV Multiple branches of a `ifdef highlighted incorrectly when using -source_debug switch
AVSREQ-140623 SIMVISION_WAVEFORMS Simvision loses user defined radix information after loding the svwf
AVSREQ-138183 LP_1801 Would you enhance the $xm_mirror_force operation for IEEE 1801 power down up sequence?
AVSREQ-131187 RAND_DEBUG Show assignment constraints and solved values/order in contradiction message
AVSREQ-136905 COVERAGE_FUNCTIONAL ignore_bins using with expression not working as expected
AVSREQ-128137 RAND_SOLVER INTERR SIGABRT
AVSREQ-135476 ELAB_SV dpes related crash
AVSREQ-133006 ELAB_PERF irun taking 6+ hours on ixcom generated snapshot for CPU design
AVSREQ-126200 SIMVISION_WAVEFORMS SimCompare comparison should ignore [optimized out] signals
AVSREQ-140335 SIM_PERFORMANCE Xcelium -memopt doesn't work with -automsie options
AVSREQ-140763 SIM_PERFORMANCE Enhancement for compact form of wildcard entries in -afile
AVSREQ-126814 PARSE_SV DUPIDN error cannot be solved by option '-vlogrelax' or '-vlogcontrolrelax DUPIDN'
AVSREQ-140530 SV_CODEGEN Randomization mismatch with classlinedebug
AVSREQ-125317 SIM_SV SimVision GUI freezes during simulation of large UVM-ML design
AVSREQ-133277 JUPITER_CODEGEN *E MCGBEF MC-Code generation backend failed
AVSREQ-130919 ELAB_SV Hierarchical name not allowed within a constant expression in $bits(…)
AVSREQ-73428 PARSE_PERF Re-runing compile with no change in file list and command line recompiles module with -allowredefinition
AVSREQ-127970 COVERAGE_GENERAL Unable to merge xlm2unicov converted cov_db with Perspec cov_db in vManager
AVSREQ-136700 RAND_SOLVER *F,RNDUNR: XCELIGEN assertion failed - fen1
AVSREQ-134749 LP_1801 Ignore space on pathname
AVSREQ-131117 DEBUG_DESIGN_DATABASE Wrong value annotation on field of packed struct inside interface (shows the value of the whole struct)
AVSREQ-131185 LP_1801 Incorrect USFTAS when $size is used in bit select of LSB
AVSREQ-130201 SPECMAN_COV Using transition coverage with ignore option is inconsistent with and without no_collect option
AVSREQ-128552 ELAB_SV Crash when lps_sv_interface_port_enh and lps_sv_allow_dead_nodes options are used.
AVSREQ-140772 DMS_MSIE Compared to monolithic flow, more than 2x degradations are noticed in GLS SDF annotated MSIE [DSS IIP] elaboration
AVSREQ-127885 ELAB_SV_VHDL SV-VHDL: support port mapping of VHDL record with SV literal
AVSREQ-139415 VHDL_PARSE xmelab: *E,TRRANGEC: range constraint violation.
AVSREQ-133385 DEBUG_DESIGN_DATABASE No text-ref for array of struct
AVSREQ-131345 LP_CPF xmelab hang with CPF
AVSREQ-127805 SV_DPI MEMALC issues and gdb does not stop on serror for this ERROR
AVSREQ-121919 LP_1801 Switch -lps_dbc corrupts real variables when used
AVSREQ-92252 PARSE_SV Built-in method call as a prefix of a selection is not supported: enum.next().name()
AVSREQ-116715 XRUN_GENERAL Allow -y and -v with files compiled inside -makelib/-endlib
AVSREQ-131418 LP_1801 spurious RTNTYP message
AVSREQ-138792 SIM_SV Unexpected RTSVAV on unexecuted code
AVSREQ-135849 RAND_GENERAL xmsim: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-138282 LP_1801 -lps_net_split can't output isolation report correctly
AVSREQ-134419 JUPITER_ENGINE Process linker failed with RT_STATUS_FAILURE
AVSREQ-125442 PARSE_SV include interface code in -classlinedebug
AVSREQ-133003 LP_1801 Simulation Crash on LP environment calling upf_query_object_properties()
AVSREQ-139421 SIMVISION_DB_UTIL simvisdbutil is not recongising -scope option with submodule hierarchy while generating SAIF
AVSREQ-131476 SV_PERFORMANCE Associative array gets corrupted
AVSREQ-118414 ASSERTION_SIM Support for string variable used in $asserton
AVSREQ-136247 CORE_RAND TRAT multi cloner - default function arguments
AVSREQ-126787 SV_DPI No way for customers to track down their own MEMALC issues
AVSREQ-126882 DMS_BIND Floating connect modules between bind .sv assertion net and the design net when CM mode is split
AVSREQ-130913 LP_DOC Add reset for latch isolation strategies in documentation
AVSREQ-133681 SIM_PERFORMANCE Incorrect Z in waveform with reduced access
AVSREQ-128559 RAND_DEBUG Request to improve the contradiction error message
AVSREQ-127203 RAND_SOLVER guarded constraint on array element gives array resize error under certain conditions
AVSREQ-129600 VPI_VISA vpiPartSelect.ERROR: VPI NOPTVAL
AVSREQ-132854 ASSERTION_DEBUG Crash on user design during $assertoff - may be probe related
AVSREQ-112698 PARSE_SV Require for supporting @(edge) by Xcelium
AVSREQ-130870 XPROPAGATION_PERFORMANCE Xprop elaboration time doubled in new project
AVSREQ-136734 COVERAGE_GENERAL Facing crash "sv_seghandler - trapno -1 addr((nil))" in VHDL+Specman environment
AVSREQ-111001 UVM_ML Create a link to the 32bit directory in the UVM ML installation
AVSREQ-128159 ELAB_SV Resolve xmelab: *E,APNOTP error
AVSREQ-114515 PARSE_SV xmvlog: *E,ILLPRI (fld.svh,45|36): illegal expression primary [4.2(IEEE)] for incorrect for loop usage
AVSREQ-112469 PARSE_SV Optional for loop conditional
AVSREQ-142614 XPROPAGATION_GENERAL xprop report with systemC TB generates a wrong report
AVSREQ-146619 SIM_PERFORMANCE xmvlog_cg internal error in 20.12-t002, unexpected signal #11
AVSREQ-123664 COVERAGE_FUNCTIONAL User wants tool to warn if number of coverbins for a coverpoint or cross is > than a specified number
AVSREQ-137238 XPROPAGATION_GENERAL Unexpected array corruption
AVSREQ-133951 RAND_SOLVER Randomization fails with 20.07 & passes with 19.09
AVSREQ-138908 SPECTRE_AMSD Problem with Specman VHDL adapter
AVSREQ-95768 LP_1801 generate statement instance hierarchy should be configured as DSG tool
AVSREQ-114366 ELAB_BIND Switch -vcfg_no_default_bind not resolving the bind modules
AVSREQ-128252 ELAB_CLONE Xmclone rejected cloning of the selected partitions due to defparam
AVSREQ-142442 SPECMAN_COMPILE e file translation lingers
AVSREQ-140746 LP_1801 BCNOCP fatal error when attempting to use bind_checker
AVSREQ-87501 DMS_ELAB SVRNM: Support Instance Array (IE insertion) with Nettype Ports (including Wreal)
AVSREQ-121869 MSIE_ELAB DSSVAR error in multi-step MSIE flow
AVSREQ-106968 VPI_GENERAL Add ability to ignore module types for xminitialize
AVSREQ-130185 SV_CODEGEN Internal error - gq_gen - OP_SVHASSIGN SVHR type mismatch
AVSREQ-143607 VWDB probing - may be process_save related
AVSREQ-134334 JUPITER_COMPILER Crash during south causing Multicore elaboration to exit
AVSREQ-131189 RAND_DEBUG Add option like "trace_fail" to utrace
AVSREQ-135027 LP_1801 upf_package auto-compiler breaks the current flow for pre-compiled libs
AVSREQ-135933 SV_INTERFACE support for ifgen in interface on a domain boundary in low power simulation
AVSREQ-100963 UVM_SV UVM IEEE fails with BDTYP: " Cannot create a component because it is not registered with the factory."
AVSREQ-112909 PARSE_SV Parse enabled edge construct support for elab work to begin
AVSREQ-88771 SV_PARAMETERS xmelab: *F,INTERR: Internal Exception: Using -defparam with no default value for an undefined type parameter
AVSREQ-125936 XRUN_GENERAL xrun -hdlvar creates hdl.var in xcelium.d that contains relative paths instead of specified full path
AVSREQ-114045 SIM_VHDL Crash in cgp_callstr on LOP
AVSREQ-115321 LP_1801 connect_logic_net issue with multiple fanout
AVSREQ-142890 LP_1801 force assignment is not instantiate in LP test
AVSREQ-129133 DMS_INTERACTIVE DMSDEBUG: extend MXNET SQL flow to add profile data
AVSREQ-142656 LP_1801 xmelab : Crash with LWDGEN Message : sv_seghandler - trapno -1 addr(0x100000011)
AVSREQ-123346 IP_PROTECT_GENERAL -vlogcontrolrelax NOTDOT is causing strange error in encrypted files
AVSREQ-124736 LP_1801 Xcelium should not issue an error when create_logic_net specifies a connection to same net in RTL
AVSREQ-129475 LP_DOC Enhance -lps_bind_aon documentation
AVSREQ-130760 SIM_PERFORMANCE Xcelium is 4.3X slower than VCS with new EHF kit 20.09-e698-20200902
AVSREQ-96045 SIMVISION_TCL Simvision - PSFXL DB name in incorrect in svcf file
AVSREQ-129642 FUNC_SAFETY_CONCURRENT Safety Waveform and Propagation list cannot be extracted in the same run
AVSREQ-108298 DMS_ELAB real_net_alias fails in certain situations
AVSREQ-118847 LP_1801 UPF : LPS cannot shutdown when nwell is power off.
AVSREQ-114035 LP_1801 xmelab: *E,CLNUSR: [LPS] Unsupported HDL connection, expected a net referenced in the connect_logic_net command
AVSREQ-126091 SAVE_RESTART_DMTCP DMTCP has an issue with real paths
AVSREQ-138044 RAND_SOLVER Solver crash when running using pre-TRAT and local_oc=1
AVSREQ-128220 RAND_SOLVER Randomization of a struct fails when some of the fields were solved early
AVSREQ-144893 SIM_PERFORMANCE xmsim INTERR w/ FSDB dump
AVSREQ-130326 PARSE_PERF Performance Degradation due to print of *W,NODNTW
AVSREQ-129375 JUPITER_BRIDGE Need Jupiter support for type operator
AVSREQ-134281 JUPITER_COMPILER MC_MTK_EVAL: Elaboration crash with EHF "-mce_splitting_allow_increment_pct 5" due to huge unsplitable cones
AVSREQ-132564 XPROPAGATION_PERFORMANCE LPX buildtime degradation 5x over non-LPX
AVSREQ-133995 ELAB_PERF WOUPXR error happens at an elaboration stage
AVSREQ-126788 MSIE_ELAB CUVUNF error at elaboration for MSIE builds with oopr_to_interface flag
AVSREQ-123014 RAND_DEBUG local_oc not showing a variable that is part of the contradiction
AVSREQ-134216 DMS_WREAL *E,TYCMPAT: expaecting datatype compatible with 'unpacked array [0:0] of logic' but found 'packed array' instead
AVSREQ-134517 LP_DOC is_level_shifter (ieee 1801) vs. is_level_shifter_cell (cadence) attribute
AVSREQ-125456 SIM_PERFORMANCE always_comb sensitivity now has duplicates
AVSREQ-135343 XPROPAGATION_GENERAL Print final settings/options used by the tool to enable Xprop/Xfile features
AVSREQ-134082 RAND_SOLVER MDA foreach falsely complaining about OOBs
AVSREQ-131848 LP_1801 Support of -lps_cov with MSIE flow
AVSREQ-127847 SIMVISION_SCHEMATIC SimVision Cellmap file anotation degraded
AVSREQ-140682 SPECMAN_TEMPORAL sn 20.09 fails to initialize integer variable to zero in compiled mode for a while loop
AVSREQ-124493 SV_GENERAL Support needed for disabling named fork block
AVSREQ-134890 SIMVISION_SIGNAL_TRACING Auto X tracing Issue in Xcelium
AVSREQ-99976 PARSE_SV Incisive to support extern keyword in class constraints.
AVSREQ-134384 LP_SV crash points to unpacked array
AVSREQ-83727 ELAB_BIND MTOMDU when compiling config with same name after compiling module
AVSREQ-135226 FUNC_SAFETY_CONCURRENT Concurrent FI failed on FLTCALWAYS
AVSREQ-135138 SV_CODEGEN -ii_ext is causing xmvlog_cg crash
AVSREQ-129841 HAL BADOPT INC_V200X_PKG when used with -hal
AVSREQ-117925 DMS_AMSD signal not propagated from multi-bit signals from VHDL source to real sv port
AVSREQ-127631 LP_1801 [LPS_DSS_PCELL_VERBOSE] Print verbose infomation for pgpin autoconnection in Tb scope
AVSREQ-133816 LP_1801 Example where NOISELE is not being created
AVSREQ-142902 FUNC_SAFETY_CONCURRENT MESSAGE: sv_seghandler - trapno -1 addr((nil))
AVSREQ-140044 DEBUG_DESIGN_DATABASE Missing text reference on OOMR, Part 3: STRAP support for remaining cases of bit/member select
AVSREQ-124636 PARSE_PERF compilation of ATPG design w/ xmvlog took too much time
AVSREQ-136296 SIM_CAPTURE_REPLAY Xcelium fault simulation issues fatal error FLTGSNF in serial b2b flow with replay
AVSREQ-137920 IP_PROTECT_GENERAL xmprotect runtime is much slower than OT
AVSREQ-127636 PARSE_SV UNDIDN : forward declaration in a class (-ENABLE_USE_BEFORE_DECL_IN_CLASS)
AVSREQ-141237 LP_1801 Support for return only main retention of strategy created using UPF_GENERIC_CLOCK
AVSREQ-138354 XRUN_GENERAL xrun does not like forward slash / in front of env variables
AVSREQ-138690 LP_1801 lps_enable_enh_coa option causing elaboration crash during code generation
AVSREQ-140888 SV_GENERAL ncvlog: *E,STRMEM (test.sv,13|64): Using String without index is not supported in the given context.
AVSREQ-140492 SV_CLASSES Xcelium seems to throw false CUVNPM error
AVSREQ-118168 VPI_GENERAL Enhancement request to support module based initialization
AVSREQ-130461 ELAB_SV_VHDL xmelab: *E,CFIGTC When localparam connected to VHDL generic
AVSREQ-121149 SAVE_RESTART_GENERAL Why snapshot not created under -cds_implicit_tmpdir in process based save restart during restart simulation
AVSREQ-88789 LP_1801 Add support to disable timing checks during power shutdown and turn on
AVSREQ-136676 SIM_PERFORMANCE Internal Exception when enabling shm dump
AVSREQ-115114 SIM_VHDL Crash at IBM on LOP
AVSREQ-140845 FUNC_SAFETY_CONCURRENT Simulation crashes with xmsim: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-103554 SPECMAN_COV Xcelium 19.03-s001 crash while writing coverage model
AVSREQ-102130 VHDL_PARSE xmvhdl_p: *E,STIUNC (../../hdl/sbc_proj_pkg.vhd,138|29): subtype indication must not denote an unconstrained array type
AVSREQ-116563 LP_1801 Enable -lps_cov with -mkprimary when DUT/UPF is in single partition (Dual Snapshot)
AVSREQ-133139 JUPITER_SOUTH MultiCore elaboration is failing during split with assertion
AVSREQ-125030 FUNC_SAFETY_CONCURRENT Concurrent crash with sv_seghandler - trapno -1 addr((nil))
AVSREQ-136137 ELAB_BIND SVBMUF with exclusive vlog config
AVSREQ-125372 MSIE_SIMULATION false assertion failure
AVSREQ-135229 LP_1801 RTNCCER due to OOMR initialization
AVSREQ-130894 LP_1801 XRIO: Parser bug - wrong handling of generate block in power-domain and isolation strategy name
AVSREQ-113544 PROFILER_SIM_RUNTIME Support for IE Profiling
AVSREQ-127042 VPI_GENERAL Unexpected SSS layer return code -19 in internal PLI routine
AVSREQ-127579 FUNC_SAFETY_CONCURRENT Internal exception while running the concurrent run
AVSREQ-140637 XRUN_GENERAL ROELAB is not propagated to makelib

=================================================
CCRID Product Title
–––––––- –––––––––––– –––––––––––––––––––––––––––
AVSREQ-136681 GLS_SDF GLS simulation with SDF of interconnect delay behavior abnormal
AVSREQ-154044 SV_PERFORMANCE Task inline optimization causing test failure
AVSREQ-151419 SPECMAN_COMMANDS files.get_text_lines not work as expected
AVSREQ-157117 VWDB : +vwdb+shm2vwdb=1 switch is not working in 21.03-s007
AVSREQ-156092 VHDL_PERFORMANCE unexpected memory consumption on mixed language simulation.
AVSREQ-156315 SPECMAN_DEBUG print_stack_trace() prints wrong stack
AVSREQ-155914 DEBUG_PROBE Disable MTD in Interactive mode
AVSREQ-149474 SPECMAN_E Load crash with numeric type field under sys
AVSREQ-154490 IXCOM xmelab *F INTERNAL EXCEPTION sss_hname - can't find AOI index
AVSREQ-116449 GLS_GENERAL wrong simulation output in signals without TCL stop command
AVSREQ-155037 DMS_AMSD xmelab CUVNCM error with -cds_implicit_tmpdir and custom SVAMS CM
AVSREQ-155586 DEBUG_PROBE Simulation exits unexpectedly: rts_abrthandler - SIGABRT unexpected violation
AVSREQ-155341 VHDL_PARSE xmvhdl_p * F,INTERR:INTERNAL EXCEPTION
JIRA ID COMPONENT SUMMARY
AVSREQ-154822 VHDL_PARSE Using an underscore as the first character in library name causes xmvhdl_p: *E,BADLPP error
AVSREQ-152645 SV_GENERAL Internal exception when providing incorrect module names in the toggle exclude file
AVSREQ-153060 ELAB_BIND Elaboration fails to resolve parameter from CU scope
AVSREQ-156909 GLS_SDF xmsim INTERNAL EXCEPTION MESSAGE: rts_net_fse - bad stopreason (0)
AVSREQ-150443 SPECMAN_E C FLI mapping of uint(bits:33-64) into C uint64_t
AVSREQ-145217 SIMVISION_MS Current Browser: Need to display Leaf current for specified subckt instance
AVSREQ-153858 GLS_GENERAL Gate amalgamation causing functional failure
AVSREQ-157798 LP_1801 Got elaboration INTERNAL EXCEPTION after using UPF
AVSREQ-157111 ELAB_SV_VHDL SystemVerilog alias appears unconnected
AVSREQ-156176 HAL Internal error when -hal is used
AVSREQ-157734 ELAB_BIND Xcelium elaboration fails with xmelab: *F,INTERR: INTERNAL EXCEPTION
AVSREQ-146900 SPECMAN_ERRORS Recursion during signal handling

=============================================================
CCRID Product Title
–––––––- –––––––––––– –––––––––––––––––––––––––––
AVSREQ-147354 DMS_ELAB Allow xm_mirror to support mixed bus i.e generate a warning for mixed buses and skip xm_mirror processing for unsupported types
AVSREQ-146758 UVM_SV uvm_hdl_force converts X'es to 1's when target is in VHDL
AVSREQ-157907 SIM_VHDL VHDL code does not behave the same way in 2103 vs 1909
AVSREQ-155741 SIM_SPARSE_ARRAY [degrade] REGSOV error for large size array.
AVSREQ-157023 SIM_SV xmsim crash: MESSAGE: T(0): sv_seghandler - trapno -1 addr(0x7fd52ce94a08) Method SSS_MT_SVHASSIGN_ER_US
AVSREQ-149203 SPECTRE_AMSD Blackbox with dspf does not work in AMS
AVSREQ-154024 ELAB_PERF 2-4x increase in elaboration time when switching from 19.12a to 20.11a
AVSREQ-155927 ELAB_PERF '1 interpreted as 1 with -constexpropt
AVSREQ-155727 DMS_ANALOG_ELAB A "reg" type bus connected to a module gives error
AVSREQ-156883 ELAB_PERF Xcelium elab performance degradation in latest versions 21.03
AVSREQ-150489 GLS_TIMING ISOINTI error occur when using 21.03.a001
AVSREQ-155919 SIM_SPARSE_ARRAY Memory Blow up 6.7 Gig to 29 Gig - from 19.01.001 to 21.07.001
JIRA ID COMPONENT SUMMARY
AVSREQ-118534 SPECTRE_AMSD VoltusFi+AMSD+Xcelium Flow: Support blackbox module in dspf_include - when it is configured to Verilog/HDL
AVSREQ-157969 CORE_RAND Can't launch xmca constraint profiler due to licensing error in 21.03
AVSREQ-154069 LP_1801 Missing isolation when using set_repeater
AVSREQ-157095 VHDL_GENERAL Event on VHDL record does not trigger a wait statement
AVSREQ-149000 COVERAGE_CODE simulator hangs with coverage enabled
AVSREQ-157423 GLS_TIMING Xcelium21.03.007 elaboration crash (part1)
AVSREQ-151322 SV_PORTS Elaboration crash with sv_seghandler - trapno -1 addr(0x20)
AVSREQ-157588 IP_PROTECT_GENERAL Customers need Xcelium20.03s released w/ new IPPLIB

=====================================================
CCRID Product Title
–––––––- –––––––––––– –––––––––––––––––––––––––––
JIRA ID COMPONENT SUMMARY
AVSREQ-159080 DEBUG_PROBE Memory declared as wires exceeding VWDB limit are ignored but probed by SHM
AVSREQ-160042 GLS_SDF Internal exception: MESSAGE: rts_abrthandler - SIGABRT unexpected violation
AVSREQ-125104 DEBUG_PROBE -packed/-unpacked should apply to both wires and variables/regs
AVSREQ-159875 GLS_SDF Xcelium21.09.002 elaboration crash
AVSREQ-160491 GLS_SDF wor not fulfilled when using annotating INTERCONNECT on connected pad
AVSREQ-160462 VPI_GENERAL rand_2state : n generates wrong results
AVSREQ-146770 SIMVISION_MS Provide additional information for Describe command used with mixed net instance
AVSREQ-82520 DEBUG_PROBE Problem with probing signals exceeding 4096 bits
AVSREQ-157239 SIMVISION_MS Mixed Net Browser: sort not working for scientific notation values
AVSREQ-157588 IP_PROTECT_GENERAL Customers need Xcelium20.03s released w/ new IPPLIB
AVSREQ-160574 SIMVISION_MS AMSD_Simvision : Schematic Tracer : Signal not connected to port
AVSREQ-159623 XPROPAGATION_GENERAL ELAB crash: gq_maxbitaccess - no bit vector

=======================================================
CCRID Product Title
–––––––- –––––––––––– –––––––––––––––––––––––––––
JIRA ID COMPONENT SUMMARY
AVSREQ-163494 ELAB_VHDL Xcelium 21.03 VHDL code generation crash
AVSREQ-142484 GLS_SDF The RETAIN timing arcs are ignored when the SDF annotation is performed dynamically.
AVSREQ-165498 LP_1801 isolation location parent not honoured but self (terminalB context)
AVSREQ-165036 SPECTRE_AMSD AMS: bus issue with sst2
AVSREQ-160428 DCP Rename .xmdcp directory to .dcp
AVSREQ-149815 SIM_USABILITY xmsim: *E,OBJACC: Object must have read access: <…signal name…>
AVSREQ-160874 DCP amsspice ERROR (SFE-868) because the file was not captured
AVSREQ-163616 DMS_ELAB xmelab *F INTERNAL EXCEPTION sss_hname - can't find AOI index (looks like AVSREQ-154490)
AVSREQ-160583 PARSE_SV xmvlog INTERR: get_randomize_class_prefix_decl() - Unexpected prefix used with class randomize
AVSREQ-155534 DMS_LP_AMS Crash during elaboration in SPICE+UPF sim with message: p_pot = NULL [NULL decl POT] - pwr_break_expr_vlog_etc
AVSREQ-164133 DMS_LP_AMS Elab crash with xmelab: *E,CUVIMG (./rundir/INCA_libs/AMSD/cds_amslps_simulation.vp): Implicit name not allowed in hierarchical name.
AVSREQ-164026 SYSC_GDB Generic payload - incomplete type in GDB

Integrated & Compatible with Version #
––––––––––- –––––––
SPECTRE Validated with 20.1.0.434.isr14. Compatible with Spectre 19.1.isr6 or later.
VIPCAT Validated with VIPCAT 11.30.081-s and compatible with 11.30.045 and later.
IXCOM V21.07.086.s003-alt
HDLICE V21.07.086.s003
VXE V21.02.201.s005
WXE V21.00.206.s006
JASPER 2021.12p002
imc/vManager VMANAGER 21.09-s005
indago 21.03.002-s and 22.01.071-a and later

Enhancements and Defects fixed in XCELIUM21.03.015
=========================================================
CCRID Product Title
–––––––- –––––––––––– –––––––––––––––––––––––––––

Base_XCELIUMMAIN21.03.001_lnx86
Hotfix_XCELIUMMAIN21.03.010_lnx86
Hotfix_XCELIUMMAIN21.03.011_lnx86
Hotfix_XCELIUMMAIN21.03.012_lnx86
Hotfix_XCELIUMMAIN21.03.014_lnx86
Hotfix_XCELIUMMAIN21.03.015_lnx86

XCELIUM is simply a newer generation of the digital functional verification tools. Older versions were called INCISIVE. The last INCISIVE version was the 15.20 release, and there have been several XCELIUM releases since then. If using INCISIVE, you'd need to use "ncvhdl" instead of "xmvhdl".