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System Verilog for Verification: A Guide to Learning the Testbench Language Features, Second Edition (Repost)

Posted By: AvaxGenius
System Verilog for Verification: A Guide to Learning the Testbench Language Features, Second Edition (Repost)

System Verilog for Verification: A Guide to Learning the Testbench Language Features, Second Edition By Chris Spear
English | PDF | 2008 | 455 Pages | ISBN : 144194561X | 16.33 MB

Based on the bestselling first edition this extensively revised second edition includes the relevant changes that apply to the 2008 version of the SystemVerilog Language Reference Manual (LRM).
The revision of nearly every explanation and code sample
The inclusion of new chapters: "A Complete SystemVerilog Testbench" with a complete constrained random testbench for an ATM switch and "Interfacing with C" on the DPI (Directed Programming Interface)
The addition of 70 new examples including larger ones such as a directed testbench at the end of chapter four
An expanded index with 50% more entries and cross references

"As digital integrated circuits relentlessly march towards a billion transistors and beyond, Verilog testbenches are running out of steam. With logic verification taking more effort than design, moving to a higher level of abstraction is the only choice. SystemVerilog appears to be the winner in the high-level verification language market and "SystemVerilog for Verification" is the book that will take working professionals and students alike from basic Verilog to the sophisticated structures needed to verify large and complex designs."
The explanations of abstract verification constructs are more detailed, and many more comprehensive examples make it easier to see how to apply SystemVerilog in object-oriented verification. The new chapter on the SystemVerilog Direct Programming Interface (DPI) is a very valuable addition. This second edition is a must-have book for every engineer involved in Verilog and SystemVerilog design and verification. The book serves well both as a general SystemVerilog reference and for learning object-oriented verification techniques. This book is such an invaluable reference, that my company includes a copy as part of the student training materials with every SystemVerilog verification course we teach!"