Verilog Coding for Logic Synthesis
Weng Fook Lee, "Verilog Coding for Logic Synthesis"
Wiley-Interscience | 2003-04-17 | ISBN: 0471429767 | 336 pages | PDF | 1,3 MB
Wiley-Interscience | 2003-04-17 | ISBN: 0471429767 | 336 pages | PDF | 1,3 MB
Provides a practical approach to Verilog design and problem solving.
* Bulk of the book deals with practical design problems that design engineers solve on a daily basis.
* Includes over 90 design examples.
* There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification.
* Book is suitable for use as a textbook in EE departments that have VLSI courses
Only RS mirrors, please