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Fundamentals of Digital Logic with VHDL Design, 2nd edition (repost)

Posted By: arundhati
Fundamentals of Digital Logic with VHDL Design, 2nd edition (repost)

Stephen D. Brown, Zvonko G. Vranesic, "Fundamentals of Digital Logic with VHDL Design, 2nd edition"
2005 | ISBN: 0072460857 | 939 pages | PDF | 30,7 MB

Fundamentals of Digital Logic With VHDL Design teaches the basic design techniques for logic circuits. It emphasizes the synthesis of circuits and explains how circuits are implemented in real chips. Fundamental concepts are illustrated by using small examples, which are easy to understand. Then, a modular approach is used to show how larger circuits are designed. VHDL is used to demonstrate how the basic building blocks and larger systems are defined in a hardware description language, producing designs that can be implemented with modern CAD tools.
The book emphasizes the concepts that should be covered in an introductory course on logic design, focusing on:
Logic functions, gates, and rules of Boolean algebra
Circuit synthesis and optimization techniques
Number representation and arithmetic circuits
Combinational-circuit building blocks, such as multiplexers, decoders, encoders, and code converters
Sequential-circuit building blocks, such as flip-flops, registers, and counters
Design of synchronous sequential circuits
Use of the basic building blocks in designing larger systems
It also includes chapters that deal with important, but more advanced topics:
Design of asynchronous sequential circuits
Testing of logic circuits
For students who have had no exposure to basic electronics, but are interested in learning a few key concepts, there is a chapter that presents the most basic aspects of electronic implementation of digital circuits.
Major changes in the second edition of the book include
new examples to clarify the presentation of fundamental concepts
over 50 new examples of solved problems provided at the end of chapters
NAND and NOR gates now introduced in Chapter 2
more complete discussion of techniques for minimization of logic functions in Chapter 4 (including the tabular method)
a new chapter explaining the CAD flow for synthesis of logic circuits